How to understand CuTE TV layout

[MARD1NO]

For gtc2025 slides example:

I think thread[0,1,...7] holds MxK Amatrix, and thread[0, 8, 16] hold another matrix, and I'm not very clear that why output matrix looks like this.

In the black box T4V0 and T32V0 generate output T36V0, does it mean the output data hold in thread36 V0?

[thakkarV]

those A and B values are read by more than just one thread. We simply show the first one.

[MARD1NO]

Thanks, and I have another question is reading cute mma atom documentation about volta tensorcore C accumulator TV layout:

We always use ColMajor to encode coordinate in TV layout?...

[thakkarV]

Yes