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MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
Move the X86 PC-relative fixup adjustment from X86MCCodeEmitter::emitImmediate to MCAssembler, leveraging a generalized evaluateFixup. This saves a MCBinaryExpr. For `call foo`, the fixup expression is now `foo` instead of `foo-4`. Updated X86 MC tests confirm no change in generated relocations. In bolt/lib/Target/X86/X86MCPlusBuilder.cpp, createRelocation needs to decrease the addend. Both max-rss and instructions:u show a minor decrease. https://llvm-compile-time-tracker.com/compare.php?from=ea600576a6f94d6f28925c4b99962cc26b463c29&to=016e8fd4ddf851e5555f606c6394241d68f1a7bb&stat=max-rss&linkStats=on Next: Update targets that use FKF_IsAlignedDownTo32Bits to define `evaluateFixup` and remove FKF_IsAlignedDownTo32Bits from the generic code. Pull Request: llvm#147113
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+925
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lines changed

‎bolt/lib/Target/X86/X86MCPlusBuilder.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2442,6 +2442,7 @@ class X86MCPlusBuilder : public MCPlusBuilder {
24422442

24432443
assert(FKI.TargetOffset == 0 && "0-bit relocation offset expected");
24442444
const uint64_t RelOffset = Fixup.getOffset();
2445+
auto [RelSymbol, RelAddend] = extractFixupExpr(Fixup);
24452446

24462447
uint32_t RelType;
24472448
if (Fixup.isPCRel()) {
@@ -2453,6 +2454,9 @@ class X86MCPlusBuilder : public MCPlusBuilder {
24532454
case 32: RelType = ELF::R_X86_64_PC32; break;
24542455
case 64: RelType = ELF::R_X86_64_PC64; break;
24552456
}
2457+
// Adjust PC-relative fixup offsets, which are calculated from the start
2458+
// of the next instruction.
2459+
RelAddend -= FKI.TargetSize / 8;
24562460
} else {
24572461
switch (FKI.TargetSize) {
24582462
default:
@@ -2464,8 +2468,6 @@ class X86MCPlusBuilder : public MCPlusBuilder {
24642468
}
24652469
}
24662470

2467-
auto [RelSymbol, RelAddend] = extractFixupExpr(Fixup);
2468-
24692471
return Relocation({RelOffset, RelSymbol, RelType, RelAddend, 0});
24702472
}
24712473

‎llvm/include/llvm/MC/MCAsmBackend.h

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -106,9 +106,12 @@ class LLVM_ABI MCAsmBackend {
106106
return false;
107107
}
108108

109-
virtual bool evaluateTargetFixup(const MCFixup &Fixup, const MCValue &Target,
110-
uint64_t &Value) {
111-
llvm_unreachable("Need to implement hook if target has custom fixups");
109+
// Evaluate a fixup, returning std::nullopt to use default handling for
110+
// `Value` and `IsResolved`. Otherwise, returns `IsResolved` with the
111+
// expectation that the hook updates `Value`.
112+
virtual std::optional<bool> evaluateFixup(MCFixup &Fixup, MCValue &Target,
113+
uint64_t &Value) {
114+
return {};
112115
}
113116

114117
void maybeAddReloc(const MCFragment &, const MCFixup &, const MCValue &,

‎llvm/include/llvm/MC/MCValue.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@ class MCValue {
4242
friend class MCExpr;
4343
MCValue() = default;
4444
int64_t getConstant() const { return Cst; }
45+
void setConstant(int64_t C) { Cst = C; }
4546
uint32_t getSpecifier() const { return Specifier; }
4647
void setSpecifier(uint32_t S) { Specifier = S; }
4748

‎llvm/lib/MC/MCAssembler.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -166,8 +166,8 @@ bool MCAssembler::evaluateFixup(const MCFragment &F, MCFixup &Fixup,
166166
if (FixupFlags & MCFixupKindInfo::FKF_IsPCRel)
167167
Fixup.setPCRel();
168168
bool IsResolved = false;
169-
if (FixupFlags & MCFixupKindInfo::FKF_IsTarget) {
170-
IsResolved = getBackend().evaluateTargetFixup(Fixup, Target, Value);
169+
if (auto State = getBackend().evaluateFixup(Fixup, Target, Value)) {
170+
IsResolved = *State;
171171
} else {
172172
const MCSymbol *Add = Target.getAddSym();
173173
const MCSymbol *Sub = Target.getSubSym();

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -70,8 +70,8 @@ MCFixupKindInfo RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
7070
{"fixup_riscv_12_i", 20, 12, 0},
7171
{"fixup_riscv_lo12_s", 0, 32, 0},
7272
{"fixup_riscv_pcrel_hi20", 12, 20, 0},
73-
{"fixup_riscv_pcrel_lo12_i", 20, 12, MCFixupKindInfo::FKF_IsTarget},
74-
{"fixup_riscv_pcrel_lo12_s", 0, 32, MCFixupKindInfo::FKF_IsTarget},
73+
{"fixup_riscv_pcrel_lo12_i", 20, 12, 0},
74+
{"fixup_riscv_pcrel_lo12_s", 0, 32, 0},
7575
{"fixup_riscv_jal", 12, 20, 0},
7676
{"fixup_riscv_branch", 0, 32, 0},
7777
{"fixup_riscv_rvc_jump", 2, 11, 0},
@@ -655,15 +655,16 @@ static const MCFixup *getPCRelHiFixup(const MCSpecifierExpr &Expr,
655655
return nullptr;
656656
}
657657

658-
bool RISCVAsmBackend::evaluateTargetFixup(const MCFixup &Fixup,
659-
const MCValue &Target,
660-
uint64_t &Value) {
658+
std::optional<bool> RISCVAsmBackend::evaluateFixup(MCFixup &Fixup,
659+
MCValue &Target,
660+
uint64_t &Value) {
661661
const MCFixup *AUIPCFixup;
662662
const MCFragment *AUIPCDF;
663663
MCValue AUIPCTarget;
664664
switch (Fixup.getTargetKind()) {
665665
default:
666-
llvm_unreachable("Unexpected fixup kind!");
666+
// Use default handling for `Value` and `IsResolved`.
667+
return {};
667668
case RISCV::fixup_riscv_pcrel_lo12_i:
668669
case RISCV::fixup_riscv_pcrel_lo12_s: {
669670
AUIPCFixup =

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,8 +47,8 @@ class RISCVAsmBackend : public MCAsmBackend {
4747
bool shouldInsertFixupForCodeAlign(MCAssembler &Asm,
4848
MCAlignFragment &AF) override;
4949

50-
bool evaluateTargetFixup(const MCFixup &Fixup, const MCValue &Target,
51-
uint64_t &Value) override;
50+
std::optional<bool> evaluateFixup(MCFixup &Fixup, MCValue &Target,
51+
uint64_t &Value) override;
5252

5353
bool addReloc(const MCFragment &, const MCFixup &, const MCValue &,
5454
uint64_t &FixedValue, bool IsResolved);

‎llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

Lines changed: 36 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -169,7 +169,8 @@ class X86AsmBackend : public MCAsmBackend {
169169

170170
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override;
171171

172-
bool shouldForceRelocation(const MCFixup &, const MCValue &);
172+
std::optional<bool> evaluateFixup(MCFixup &Fixup, MCValue &Target,
173+
uint64_t &Value) override;
173174

174175
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target,
175176
MutableArrayRef<char> Data, uint64_t Value,
@@ -687,6 +688,40 @@ static unsigned getFixupKindSize(unsigned Kind) {
687688
}
688689
}
689690

691+
// Adjust PC-relative fixup offsets, which are calculated from the start of the
692+
// next instruction.
693+
std::optional<bool>
694+
X86AsmBackend::evaluateFixup(MCFixup &Fixup, MCValue &Target, uint64_t &Value) {
695+
switch (Fixup.getTargetKind()) {
696+
case FK_PCRel_1:
697+
Target.setConstant(Target.getConstant() - 1);
698+
break;
699+
case FK_PCRel_2:
700+
Target.setConstant(Target.getConstant() - 2);
701+
break;
702+
case FK_PCRel_4:
703+
case X86::reloc_riprel_4byte:
704+
case X86::reloc_riprel_4byte_movq_load:
705+
case X86::reloc_riprel_4byte_movq_load_rex2:
706+
case X86::reloc_riprel_4byte_relax:
707+
case X86::reloc_riprel_4byte_relax_rex:
708+
case X86::reloc_riprel_4byte_relax_rex2:
709+
case X86::reloc_branch_4byte_pcrel:
710+
case X86::reloc_riprel_4byte_relax_evex: {
711+
Target.setConstant(Target.getConstant() - 4);
712+
auto *Add = Target.getAddSym();
713+
// If this is a pc-relative load off _GLOBAL_OFFSET_TABLE_:
714+
// leaq _GLOBAL_OFFSET_TABLE_(%rip), %r15
715+
// this needs to be a GOTPC32 relocation.
716+
if (Add && Add->getName() == "_GLOBAL_OFFSET_TABLE_")
717+
Fixup = MCFixup::create(Fixup.getOffset(), Fixup.getValue(),
718+
X86::reloc_global_offset_table);
719+
} break;
720+
}
721+
// Use default handling for `Value` and `IsResolved`.
722+
return {};
723+
}
724+
690725
void X86AsmBackend::applyFixup(const MCFragment &F, const MCFixup &Fixup,
691726
const MCValue &Target,
692727
MutableArrayRef<char> Data, uint64_t Value,

‎llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

Lines changed: 1 addition & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -576,18 +576,10 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
576576
}
577577
}
578578

579-
// If the fixup is pc-relative, we need to bias the value to be relative to
580-
// the start of the field, not the end of the field.
581579
bool PCRel = false;
582580
switch (FixupKind) {
583581
case FK_PCRel_1:
584-
PCRel = true;
585-
ImmOffset -= 1;
586-
break;
587582
case FK_PCRel_2:
588-
PCRel = true;
589-
ImmOffset -= 2;
590-
break;
591583
case FK_PCRel_4:
592584
case X86::reloc_riprel_4byte:
593585
case X86::reloc_riprel_4byte_movq_load:
@@ -598,20 +590,14 @@ void X86MCCodeEmitter::emitImmediate(const MCOperand &DispOp, SMLoc Loc,
598590
case X86::reloc_branch_4byte_pcrel:
599591
case X86::reloc_riprel_4byte_relax_evex:
600592
PCRel = true;
601-
ImmOffset -= 4;
602-
// If this is a pc-relative load off _GLOBAL_OFFSET_TABLE_:
603-
// leaq _GLOBAL_OFFSET_TABLE_(%rip), %r15
604-
// this needs to be a GOTPC32 relocation.
605-
if (startsWithGlobalOffsetTable(Expr) != GOT_None)
606-
FixupKind = X86::reloc_global_offset_table;
607593
break;
608594
}
609595

610596
if (ImmOffset)
611597
Expr = MCBinaryExpr::createAdd(Expr, MCConstantExpr::create(ImmOffset, Ctx),
612598
Ctx, Expr->getLoc());
613599

614-
// Emit a symbolic constant as a fixup and 4 zeros.
600+
// Emit a symbolic constant as a fixup and a few zero bytes.
615601
Fixups.push_back(MCFixup::create(static_cast<uint32_t>(CB.size() - StartByte),
616602
Expr, FixupKind, PCRel));
617603
emitConstant(0, Size, CB);

‎llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,7 @@ define dso_local void @test1(ptr%buf) nounwind {
8787
; EGPR-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
8888
; EGPR-NEXT: testb %al, %al # encoding: [0x84,0xc0]
8989
; EGPR-NEXT: jne .LBB0_3 # encoding: [0x75,A]
90-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_3-1, kind: FK_PCRel_1
90+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_3, kind: FK_PCRel_1
9191
; EGPR-NEXT: # %bb.1: # %loop.header.preheader
9292
; EGPR-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
9393
; EGPR-NEXT: xorl %r14d, %r14d # encoding: [0x45,0x31,0xf6]
@@ -100,7 +100,7 @@ define dso_local void @test1(ptr%buf) nounwind {
100100
; EGPR-NEXT: # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7a,0x4b,0x9c,0x04,0xd0,0x0b,0x00,0x00]
101101
; EGPR-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
102102
; EGPR-NEXT: callq foo # encoding: [0xe8,A,A,A,A]
103-
; EGPR-NEXT: # fixup A - offset: 1, value: foo-4, kind: reloc_branch_4byte_pcrel
103+
; EGPR-NEXT: # fixup A - offset: 1, value: foo, kind: reloc_branch_4byte_pcrel
104104
; EGPR-NEXT: ldtilecfg {{[0-9]+}}(%rsp) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0x49,0x84,0x24,0xc0,0x03,0x00,0x00]
105105
; EGPR-NEXT: movabsq $64, %rax # encoding: [0x48,0xb8,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
106106
; EGPR-NEXT: tileloadd 3024(%rsp,%rax), %tmm3 # 1024-byte Folded Reload
@@ -116,7 +116,7 @@ define dso_local void @test1(ptr%buf) nounwind {
116116
; EGPR-NEXT: incl %r14d # encoding: [0x41,0xff,0xc6]
117117
; EGPR-NEXT: cmpw $100, %r14w # encoding: [0x66,0x41,0x83,0xfe,0x64]
118118
; EGPR-NEXT: jl .LBB0_2 # encoding: [0x7c,A]
119-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_2-1, kind: FK_PCRel_1
119+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_2, kind: FK_PCRel_1
120120
; EGPR-NEXT: .LBB0_3: # %exit
121121
; EGPR-NEXT: addq $4056, %rsp # encoding: [0x48,0x81,0xc4,0xd8,0x0f,0x00,0x00]
122122
; EGPR-NEXT: # imm = 0xFD8
@@ -226,7 +226,7 @@ define dso_local void @test2(ptr%buf) nounwind {
226226
; EGPR-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
227227
; EGPR-NEXT: testb %al, %al # encoding: [0x84,0xc0]
228228
; EGPR-NEXT: jne .LBB1_3 # encoding: [0x75,A]
229-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_3-1, kind: FK_PCRel_1
229+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_3, kind: FK_PCRel_1
230230
; EGPR-NEXT: # %bb.1: # %loop.header.preheader
231231
; EGPR-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
232232
; EGPR-NEXT: xorl %r14d, %r14d # encoding: [0x45,0x31,0xf6]
@@ -237,7 +237,7 @@ define dso_local void @test2(ptr%buf) nounwind {
237237
; EGPR-NEXT: tilezero %tmm0 # encoding: [0xc4,0xe2,0x7b,0x49,0xc0]
238238
; EGPR-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
239239
; EGPR-NEXT: callq foo # encoding: [0xe8,A,A,A,A]
240-
; EGPR-NEXT: # fixup A - offset: 1, value: foo-4, kind: reloc_branch_4byte_pcrel
240+
; EGPR-NEXT: # fixup A - offset: 1, value: foo, kind: reloc_branch_4byte_pcrel
241241
; EGPR-NEXT: ldtilecfg {{[0-9]+}}(%rsp) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0x49,0x44,0x24,0x08]
242242
; EGPR-NEXT: tilezero %tmm2 # encoding: [0xc4,0xe2,0x7b,0x49,0xd0]
243243
; EGPR-NEXT: tileloadd (%rbx,%r15), %tmm0 # EVEX TO VEX Compression encoding: [0xc4,0xa2,0x7b,0x4b,0x04,0x3b]
@@ -247,7 +247,7 @@ define dso_local void @test2(ptr%buf) nounwind {
247247
; EGPR-NEXT: incl %r14d # encoding: [0x41,0xff,0xc6]
248248
; EGPR-NEXT: cmpw $100, %r14w # encoding: [0x66,0x41,0x83,0xfe,0x64]
249249
; EGPR-NEXT: jl .LBB1_2 # encoding: [0x7c,A]
250-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_2-1, kind: FK_PCRel_1
250+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_2, kind: FK_PCRel_1
251251
; EGPR-NEXT: .LBB1_3: # %exit
252252
; EGPR-NEXT: addq $72, %rsp # encoding: [0x48,0x83,0xc4,0x48]
253253
; EGPR-NEXT: popq %rbx # encoding: [0x5b]

‎llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ define dso_local void @test_api(i16 signext %0, i16 signext %1) nounwind {
125125
; EGPR-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
126126
; EGPR-NEXT: testb %al, %al # encoding: [0x84,0xc0]
127127
; EGPR-NEXT: jne .LBB0_2 # encoding: [0x75,A]
128-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_2-1, kind: FK_PCRel_1
128+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_2, kind: FK_PCRel_1
129129
; EGPR-NEXT: # %bb.1: # %if.true
130130
; EGPR-NEXT: movl $buf, %eax # encoding: [0xb8,A,A,A,A]
131131
; EGPR-NEXT: # fixup A - offset: 1, value: buf, kind: FK_Data_4
@@ -143,13 +143,13 @@ define dso_local void @test_api(i16 signext %0, i16 signext %1) nounwind {
143143
; EGPR-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
144144
; EGPR-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
145145
; EGPR-NEXT: callq foo # encoding: [0xe8,A,A,A,A]
146-
; EGPR-NEXT: # fixup A - offset: 1, value: foo-4, kind: reloc_branch_4byte_pcrel
146+
; EGPR-NEXT: # fixup A - offset: 1, value: foo, kind: reloc_branch_4byte_pcrel
147147
; EGPR-NEXT: ldtilecfg (%rsp) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0x49,0x04,0x24]
148148
; EGPR-NEXT: movabsq $64, %rax # encoding: [0x48,0xb8,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
149149
; EGPR-NEXT: tileloadd 64(%rsp,%rax), %tmm6 # 1024-byte Folded Reload
150150
; EGPR-NEXT: # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7b,0x4b,0x74,0x04,0x40]
151151
; EGPR-NEXT: jmp .LBB0_3 # encoding: [0xeb,A]
152-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_3-1, kind: FK_PCRel_1
152+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB0_3, kind: FK_PCRel_1
153153
; EGPR-NEXT: .LBB0_2: # %if.false
154154
; EGPR-NEXT: movl $buf, %eax # encoding: [0xb8,A,A,A,A]
155155
; EGPR-NEXT: # fixup A - offset: 1, value: buf, kind: FK_Data_4
@@ -167,7 +167,7 @@ define dso_local void @test_api(i16 signext %0, i16 signext %1) nounwind {
167167
; EGPR-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
168168
; EGPR-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
169169
; EGPR-NEXT: callq foo # encoding: [0xe8,A,A,A,A]
170-
; EGPR-NEXT: # fixup A - offset: 1, value: foo-4, kind: reloc_branch_4byte_pcrel
170+
; EGPR-NEXT: # fixup A - offset: 1, value: foo, kind: reloc_branch_4byte_pcrel
171171
; EGPR-NEXT: ldtilecfg (%rsp) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0x49,0x04,0x24]
172172
; EGPR-NEXT: movabsq $64, %rax # encoding: [0x48,0xb8,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
173173
; EGPR-NEXT: tileloadd 64(%rsp,%rax), %tmm6 # 1024-byte Folded Reload
@@ -294,7 +294,7 @@ define dso_local void @test3(ptr%buf) nounwind {
294294
; EGPR-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
295295
; EGPR-NEXT: testb %al, %al # encoding: [0x84,0xc0]
296296
; EGPR-NEXT: jne .LBB1_3 # encoding: [0x75,A]
297-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_3-1, kind: FK_PCRel_1
297+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_3, kind: FK_PCRel_1
298298
; EGPR-NEXT: # %bb.1: # %loop.header.preheader
299299
; EGPR-NEXT: movq %rdi, %rbx # encoding: [0x48,0x89,0xfb]
300300
; EGPR-NEXT: movl $32, %r14d # encoding: [0x41,0xbe,0x20,0x00,0x00,0x00]
@@ -307,7 +307,7 @@ define dso_local void @test3(ptr%buf) nounwind {
307307
; EGPR-NEXT: tilezero %tmm0 # encoding: [0xc4,0xe2,0x7b,0x49,0xc0]
308308
; EGPR-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
309309
; EGPR-NEXT: callq foo # encoding: [0xe8,A,A,A,A]
310-
; EGPR-NEXT: # fixup A - offset: 1, value: foo-4, kind: reloc_branch_4byte_pcrel
310+
; EGPR-NEXT: # fixup A - offset: 1, value: foo, kind: reloc_branch_4byte_pcrel
311311
; EGPR-NEXT: ldtilecfg {{[0-9]+}}(%rsp) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x78,0x49,0x44,0x24,0x08]
312312
; EGPR-NEXT: tilezero %tmm0 # encoding: [0xc4,0xe2,0x7b,0x49,0xc0]
313313
; EGPR-NEXT: tileloadd (%rbx,%r14), %tmm1 # EVEX TO VEX Compression encoding: [0xc4,0xa2,0x7b,0x4b,0x0c,0x33]
@@ -318,7 +318,7 @@ define dso_local void @test3(ptr%buf) nounwind {
318318
; EGPR-NEXT: incl %r15d # encoding: [0x41,0xff,0xc7]
319319
; EGPR-NEXT: cmpw $100, %r15w # encoding: [0x66,0x41,0x83,0xff,0x64]
320320
; EGPR-NEXT: jl .LBB1_2 # encoding: [0x7c,A]
321-
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_2-1, kind: FK_PCRel_1
321+
; EGPR-NEXT: # fixup A - offset: 1, value: .LBB1_2, kind: FK_PCRel_1
322322
; EGPR-NEXT: .LBB1_3: # %exit
323323
; EGPR-NEXT: addq $72, %rsp # encoding: [0x48,0x83,0xc4,0x48]
324324
; EGPR-NEXT: popq %rbx # encoding: [0x5b]

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