Skip to content

Commit 460b5d4

Browse files
authored
Merge pull request #1042
fix hardware FP atomics test on older devices
2 parents aef0a5b + 4c9275e commit 460b5d4

1 file changed

Lines changed: 15 additions & 1 deletion

File tree

test/core/codegen.jl

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,10 +40,24 @@ end
4040
return
4141
end
4242

43+
# `global_atomic_add_f32` only exists on CDNA (gfx908, gfx90a, gfx94x, gfx95x)
44+
# and RDNA3+ (gfx11+), see `FeatureAtomicFaddNoRtnInsts` in LLVM's AMDGPU.td.
45+
# Vega (gfx900-gfx906) and RDNA1/2 (gfx10xx) lack it, so LLVM must expand
46+
# the atomic to a CAS loop there.
47+
arch = first(split(AMDGPU.HIP.gcn_arch(AMDGPU.device()), ':'))
48+
gen = parse(Int, match(r"^gfx([0-9a-f]+)", arch).captures[1]; base=16)
49+
has_hw_fadd = 0x908 <= gen < 0x1000 || gen >= 0x1100
50+
4351
for (T, fp) in ((Float32, "f32"),)
4452
iob = IOBuffer()
4553
tt = Tuple{AMDGPU.Device.ROCDeviceVector{T, AMDGPU.Device.AS.Global}}
4654
AMDGPU.code_gcn(iob, atomic_fp_ker!, tt; kernel=true)
47-
@test occursin("global_atomic_add_$fp", String(take!(iob)))
55+
gcn = String(take!(iob))
56+
if has_hw_fadd
57+
@test occursin("global_atomic_add_$fp", gcn)
58+
else
59+
@test occursin("global_atomic_cmpswap", gcn)
60+
@test !occursin("global_atomic_add_$fp", gcn)
61+
end
4862
end
4963
end

0 commit comments

Comments
 (0)