vscode-riscv-sense/package.json at main · Ismael/vscode-riscv-sense · GitHub

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{
  "name": "riscv-sense",
  "displayName": "RISC-V Sense",
  "description": "IntelliSense for RISC-V RV32IM assembly - autocomplete, signature help, and hover documentation for students",
  "version": "0.1.6",
  "publisher": "ismaelgfk",
  "license": "MIT",
  "repository": {
    "type": "git",
    "url": "https://github.com/ismael/vscode-riscv-sense"
  },
  "engines": {
    "vscode": "^1.85.0"
  },
  "categories": [
    "Programming Languages",
    "Snippets",
    "Education"
  ],
  "keywords": [
    "risc-v",
    "riscv",
    "assembly",
    "asm",
    "rv32i",
    "rv32im",
    "intellisense",
    "education"
  ],
  "activationEvents": [
    "onLanguage:riscv"
  ],
  "main": "./out/extension.js",
  "contributes": {
    "languages": [
      {
        "id": "riscv",
        "aliases": [
          "RISC-V Assembly",
          "RISC-V",
          "riscv"
        ],
        "extensions": [
          ".s",
          ".S",
          ".asm"
        ],
        "configuration": "./language-configuration.json"
      }
    ],
    "grammars": [
      {
        "language": "riscv",
        "scopeName": "source.riscv",
        "path": "./syntaxes/riscv.tmLanguage.json"
      }
    ],
    "configuration": {
      "title": "RISC-V Sense",
      "properties": {
        "riscvSense.enableMExtension": {
          "type": "boolean",
          "default": true,
          "description": "Include M extension (multiply/divide) instructions in suggestions"
        },
        "riscvSense.showPseudoInstructions": {
          "type": "boolean",
          "default": true,
          "description": "Include pseudo-instructions in suggestions"
        },
        "riscvSense.preferAbiNames": {
          "type": "boolean",
          "default": true,
          "description": "Show ABI register names (a0, t0) before numeric names (x10, x5)"
        },
        "riscvSense.assembler.debounceDelay": {
          "type": "number",
          "default": 500,
          "minimum": 100,
          "maximum": 5000,
          "description": "Milliseconds to wait after the last edit before running the assembler"
        },
        "riscvSense.diagnostics.enabled": {
          "type": "boolean",
          "default": true,
          "description": "Enable real-time diagnostics using the RISC-V assembler"
        },
        "riscvSense.formatting.instructionColumn": {
          "type": "number",
          "default": 8,
          "minimum": 0,
          "description": "Column to align instructions at (0 to disable alignment)"
        },
        "riscvSense.formatting.operandColumn": {
          "type": "number",
          "default": 16,
          "minimum": 0,
          "description": "Column to align operands at"
        },
        "riscvSense.formatting.commentColumn": {
          "type": "number",
          "default": 40,
          "minimum": 0,
          "description": "Column to align inline comments at"
        }
      }
    }
  },
  "scripts": {
    "vscode:prepublish": "npm run compile",
    "compile": "tsc -p ./",
    "watch": "tsc -watch -p ./",
    "lint": "eslint src --ext ts"
  },
  "devDependencies": {
    "@types/node": "^20.0.0",
    "@types/vscode": "^1.85.0",
    "@typescript-eslint/eslint-plugin": "^6.0.0",
    "@typescript-eslint/parser": "^6.0.0",
    "eslint": "^8.50.0",
    "typescript": "^5.3.0"
  }
}