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Update main.py
1 parent 6cc154f commit df00e63

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Lines changed: 10 additions & 10 deletions

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main.py

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ def main(q):
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args = sys.argv
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if len(args) < 2:
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print("No n64 rom file provided.")
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#filename_arg = f"system-tests/CPULW.N64"
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filename_arg = f"system-tests/DMAAlignment-PI-ROM-FROM_large_6.N64"
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elif len(args) == 2:
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filename_arg = args[1]
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@@ -242,15 +242,15 @@ def main(q):
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if cpu.get_op() == 1000000:
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None
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if cpu.get_op() % 0x17D6C2 == 0:
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if cpu.memory.VI.currentHalflines < cpu.memory.VI.numHalflines:
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cpu.memory.VI.registers._registers['vi_v_current_reg'] = (cpu.memory.VI.currentHalflines << 1)
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cpu.memory.VI.currentHalflines += 1
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#image_queue.put(None)
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cpu.memory.VI.render(cpu.memory)
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image_queue.put(cpu.memory.VI.render(cpu.memory))
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cpu.memory.VI.currentHalflines = 0
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if cpu.get_op() % 0x174B*262 == 0:
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#if cpu.memory.VI.currentHalflines < cpu.memory.VI.numHalflines:
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cpu.memory.VI.registers._registers['vi_v_current_reg'] = (cpu.memory.VI.currentHalflines << 1)
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cpu.memory.VI.currentHalflines += 1
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#image_queue.put(None)
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cpu.memory.VI.render(cpu.memory)
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image_queue.put(cpu.memory.VI.render(cpu.memory))
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cpu.memory.VI.currentHalflines = 0
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if (cpu.memory.VI.registers._registers['vi_v_current_reg'] & 0x3FE) >= cpu.memory.VI.registers._registers['vi_v_intr']:
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cpu.memory.mi.set_bit('MI_INTR_REG', 3)

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