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Merge branch 'main' into tls_support
2 parents 21617bf + 3b18a07 commit 600d403

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10 files changed

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‎portable/ARMv8M/non_secure/portable/GCC/ARM_CM23/portasm.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -137,6 +137,8 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
137137
{
138138
__asm volatile
139139
(
140+
" .syntax unified \n"
141+
" \n"
140142
" mrs r0, control \n"/* r0 = CONTROL. */
141143
" movs r1, #1 \n"/* r1 = 1. */
142144
" tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
@@ -157,6 +159,8 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
157159
{
158160
__asm volatile
159161
(
162+
" .syntax unified \n"
163+
" \n"
160164
" mrs r0, control \n"/* Read the CONTROL register. */
161165
" movs r1, #1 \n"/* r1 = 1. */
162166
" bics r0, r1 \n"/* Clear the bit 0. */
@@ -171,6 +175,8 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
171175
{
172176
__asm volatile
173177
(
178+
" .syntax unified \n"
179+
" \n"
174180
" mrs r0, control \n"/* r0 = CONTROL. */
175181
" movs r1, #1 \n"/* r1 = 1. */
176182
" orrs r0, r1 \n"/* r0 = r0 | r1. */
@@ -185,6 +191,8 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
185191
{
186192
__asm volatile
187193
(
194+
" .syntax unified \n"
195+
" \n"
188196
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
189197
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
190198
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
@@ -206,6 +214,8 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
206214
{
207215
__asm volatile
208216
(
217+
" .syntax unified \n"
218+
" \n"
209219
" mrs r0, PRIMASK \n"
210220
" cpsid i \n"
211221
" bx lr \n"
@@ -218,6 +228,8 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
218228
{
219229
__asm volatile
220230
(
231+
" .syntax unified \n"
232+
" \n"
221233
" msr PRIMASK, r0 \n"
222234
" bx lr \n"
223235
::: "memory"
@@ -413,6 +425,8 @@ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
413425
{
414426
__asm volatile
415427
(
428+
" .syntax unified \n"
429+
" \n"
416430
" movs r0, #4 \n"
417431
" mov r1, lr \n"
418432
" tst r0, r1 \n"
@@ -435,6 +449,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (
435449
{
436450
__asm volatile
437451
(
452+
" .syntax unified \n"
453+
" \n"
438454
" svc %0 \n"/* Secure context is allocated in the supervisor call. */
439455
" bx lr \n"/* Return. */
440456
::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
@@ -446,6 +462,8 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
446462
{
447463
__asm volatile
448464
(
465+
" .syntax unified \n"
466+
" \n"
449467
" ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */
450468
" ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */
451469
" cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */

‎portable/ARMv8M/non_secure/portable/GCC/ARM_CM23_NTZ/portasm.c

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -132,6 +132,8 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
132132
{
133133
__asm volatile
134134
(
135+
" .syntax unified \n"
136+
" \n"
135137
" mrs r0, control \n"/* r0 = CONTROL. */
136138
" movs r1, #1 \n"/* r1 = 1. */
137139
" tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
@@ -152,6 +154,8 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
152154
{
153155
__asm volatile
154156
(
157+
" .syntax unified \n"
158+
" \n"
155159
" mrs r0, control \n"/* Read the CONTROL register. */
156160
" movs r1, #1 \n"/* r1 = 1. */
157161
" bics r0, r1 \n"/* Clear the bit 0. */
@@ -166,6 +170,8 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
166170
{
167171
__asm volatile
168172
(
173+
" .syntax unified \n"
174+
" \n"
169175
" mrs r0, control \n"/* r0 = CONTROL. */
170176
" movs r1, #1 \n"/* r1 = 1. */
171177
" orrs r0, r1 \n"/* r0 = r0 | r1. */
@@ -180,6 +186,8 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
180186
{
181187
__asm volatile
182188
(
189+
" .syntax unified \n"
190+
" \n"
183191
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
184192
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
185193
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
@@ -201,6 +209,8 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
201209
{
202210
__asm volatile
203211
(
212+
" .syntax unified \n"
213+
" \n"
204214
" mrs r0, PRIMASK \n"
205215
" cpsid i \n"
206216
" bx lr \n"
@@ -213,6 +223,8 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
213223
{
214224
__asm volatile
215225
(
226+
" .syntax unified \n"
227+
" \n"
216228
" msr PRIMASK, r0 \n"
217229
" bx lr \n"
218230
::: "memory"
@@ -348,6 +360,8 @@ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
348360
{
349361
__asm volatile
350362
(
363+
" .syntax unified \n"
364+
" \n"
351365
" movs r0, #4 \n"
352366
" mov r1, lr \n"
353367
" tst r0, r1 \n"

‎portable/ARMv8M/non_secure/portable/GCC/ARM_CM33/portasm.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -135,6 +135,8 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
135135
{
136136
__asm volatile
137137
(
138+
" .syntax unified \n"
139+
" \n"
138140
" mrs r0, control \n"/* r0 = CONTROL. */
139141
" tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
140142
" ite ne \n"
@@ -152,6 +154,8 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
152154
{
153155
__asm volatile
154156
(
157+
" .syntax unified \n"
158+
" \n"
155159
" mrs r0, control \n"/* Read the CONTROL register. */
156160
" bic r0, #1 \n"/* Clear the bit 0. */
157161
" msr control, r0 \n"/* Write back the new CONTROL value. */
@@ -165,6 +169,8 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
165169
{
166170
__asm volatile
167171
(
172+
" .syntax unified \n"
173+
" \n"
168174
" mrs r0, control \n"/* r0 = CONTROL. */
169175
" orr r0, #1 \n"/* r0 = r0 | 1. */
170176
" msr control, r0 \n"/* CONTROL = r0. */
@@ -178,6 +184,8 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
178184
{
179185
__asm volatile
180186
(
187+
" .syntax unified \n"
188+
" \n"
181189
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
182190
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
183191
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
@@ -200,6 +208,8 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
200208
{
201209
__asm volatile
202210
(
211+
" .syntax unified \n"
212+
" \n"
203213
" mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */
204214
" mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
205215
" msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
@@ -215,6 +225,8 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
215225
{
216226
__asm volatile
217227
(
228+
" .syntax unified \n"
229+
" \n"
218230
" msr basepri, r0 \n"/* basepri = ulMask. */
219231
" dsb \n"
220232
" isb \n"
@@ -412,6 +424,8 @@ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
412424
{
413425
__asm volatile
414426
(
427+
" .syntax unified \n"
428+
" \n"
415429
" tst lr, #4 \n"
416430
" ite eq \n"
417431
" mrseq r0, msp \n"
@@ -429,6 +443,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (
429443
{
430444
__asm volatile
431445
(
446+
" .syntax unified \n"
447+
" \n"
432448
" svc %0 \n"/* Secure context is allocated in the supervisor call. */
433449
" bx lr \n"/* Return. */
434450
::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
@@ -440,6 +456,8 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
440456
{
441457
__asm volatile
442458
(
459+
" .syntax unified \n"
460+
" \n"
443461
" ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */
444462
" ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */
445463
" cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */

‎portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/portasm.c

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,8 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
130130
{
131131
__asm volatile
132132
(
133+
" .syntax unified \n"
134+
" \n"
133135
" mrs r0, control \n"/* r0 = CONTROL. */
134136
" tst r0, #1 \n"/* Perform r0 & 1 (bitwise AND) and update the conditions flag. */
135137
" ite ne \n"
@@ -147,6 +149,8 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
147149
{
148150
__asm volatile
149151
(
152+
" .syntax unified \n"
153+
" \n"
150154
" mrs r0, control \n"/* Read the CONTROL register. */
151155
" bic r0, #1 \n"/* Clear the bit 0. */
152156
" msr control, r0 \n"/* Write back the new CONTROL value. */
@@ -160,6 +164,8 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
160164
{
161165
__asm volatile
162166
(
167+
" .syntax unified \n"
168+
" \n"
163169
" mrs r0, control \n"/* r0 = CONTROL. */
164170
" orr r0, #1 \n"/* r0 = r0 | 1. */
165171
" msr control, r0 \n"/* CONTROL = r0. */
@@ -173,6 +179,8 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
173179
{
174180
__asm volatile
175181
(
182+
" .syntax unified \n"
183+
" \n"
176184
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
177185
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
178186
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
@@ -195,6 +203,8 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
195203
{
196204
__asm volatile
197205
(
206+
" .syntax unified \n"
207+
" \n"
198208
" mrs r0, basepri \n"/* r0 = basepri. Return original basepri value. */
199209
" mov r1, %0 \n"/* r1 = configMAX_SYSCALL_INTERRUPT_PRIORITY. */
200210
" msr basepri, r1 \n"/* Disable interrupts upto configMAX_SYSCALL_INTERRUPT_PRIORITY. */
@@ -210,6 +220,8 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
210220
{
211221
__asm volatile
212222
(
223+
" .syntax unified \n"
224+
" \n"
213225
" msr basepri, r0 \n"/* basepri = ulMask. */
214226
" dsb \n"
215227
" isb \n"
@@ -337,6 +349,8 @@ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
337349
{
338350
__asm volatile
339351
(
352+
" .syntax unified \n"
353+
" \n"
340354
" tst lr, #4 \n"
341355
" ite eq \n"
342356
" mrseq r0, msp \n"

‎portable/GCC/ARM_CM23/non_secure/portasm.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -137,6 +137,8 @@ BaseType_t xIsPrivileged( void ) /* __attribute__ (( naked )) */
137137
{
138138
__asm volatile
139139
(
140+
" .syntax unified \n"
141+
" \n"
140142
" mrs r0, control \n"/* r0 = CONTROL. */
141143
" movs r1, #1 \n"/* r1 = 1. */
142144
" tst r0, r1 \n"/* Perform r0 & r1 (bitwise AND) and update the conditions flag. */
@@ -157,6 +159,8 @@ void vRaisePrivilege( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
157159
{
158160
__asm volatile
159161
(
162+
" .syntax unified \n"
163+
" \n"
160164
" mrs r0, control \n"/* Read the CONTROL register. */
161165
" movs r1, #1 \n"/* r1 = 1. */
162166
" bics r0, r1 \n"/* Clear the bit 0. */
@@ -171,6 +175,8 @@ void vResetPrivilege( void ) /* __attribute__ (( naked )) */
171175
{
172176
__asm volatile
173177
(
178+
" .syntax unified \n"
179+
" \n"
174180
" mrs r0, control \n"/* r0 = CONTROL. */
175181
" movs r1, #1 \n"/* r1 = 1. */
176182
" orrs r0, r1 \n"/* r0 = r0 | r1. */
@@ -185,6 +191,8 @@ void vStartFirstTask( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
185191
{
186192
__asm volatile
187193
(
194+
" .syntax unified \n"
195+
" \n"
188196
" ldr r0, xVTORConst \n"/* Use the NVIC offset register to locate the stack. */
189197
" ldr r0, [r0] \n"/* Read the VTOR register which gives the address of vector table. */
190198
" ldr r0, [r0] \n"/* The first entry in vector table is stack pointer. */
@@ -206,6 +214,8 @@ uint32_t ulSetInterruptMask( void ) /* __attribute__(( naked )) PRIVILEGED_FUNCT
206214
{
207215
__asm volatile
208216
(
217+
" .syntax unified \n"
218+
" \n"
209219
" mrs r0, PRIMASK \n"
210220
" cpsid i \n"
211221
" bx lr \n"
@@ -218,6 +228,8 @@ void vClearInterruptMask( __attribute__( ( unused ) ) uint32_t ulMask ) /* __att
218228
{
219229
__asm volatile
220230
(
231+
" .syntax unified \n"
232+
" \n"
221233
" msr PRIMASK, r0 \n"
222234
" bx lr \n"
223235
::: "memory"
@@ -413,6 +425,8 @@ void SVC_Handler( void ) /* __attribute__ (( naked )) PRIVILEGED_FUNCTION */
413425
{
414426
__asm volatile
415427
(
428+
" .syntax unified \n"
429+
" \n"
416430
" movs r0, #4 \n"
417431
" mov r1, lr \n"
418432
" tst r0, r1 \n"
@@ -435,6 +449,8 @@ void vPortAllocateSecureContext( uint32_t ulSecureStackSize ) /* __attribute__ (
435449
{
436450
__asm volatile
437451
(
452+
" .syntax unified \n"
453+
" \n"
438454
" svc %0 \n"/* Secure context is allocated in the supervisor call. */
439455
" bx lr \n"/* Return. */
440456
::"i" ( portSVC_ALLOCATE_SECURE_CONTEXT ) : "memory"
@@ -446,6 +462,8 @@ void vPortFreeSecureContext( uint32_t * pulTCB ) /* __attribute__ (( naked )) PR
446462
{
447463
__asm volatile
448464
(
465+
" .syntax unified \n"
466+
" \n"
449467
" ldr r2, [r0] \n"/* The first item in the TCB is the top of the stack. */
450468
" ldr r1, [r2] \n"/* The first item on the stack is the task's xSecureContext. */
451469
" cmp r1, #0 \n"/* Raise svc if task's xSecureContext is not NULL. */

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