diff --git a/External/vixl b/External/vixl index debc345683..7725aec177 160000 --- a/External/vixl +++ b/External/vixl @@ -1 +1 @@ -Subproject commit debc3456835003b0e577f905b54bfd5addbf14db +Subproject commit 7725aec17722b32ff29c31cf28bafb3a48187e7a diff --git a/unittests/InstructionCountCI/Crypto/H0F3A.json b/unittests/InstructionCountCI/Crypto/H0F3A.json index 28d7f326ec..62fd0d6802 100644 --- a/unittests/InstructionCountCI/Crypto/H0F3A.json +++ b/unittests/InstructionCountCI/Crypto/H0F3A.json @@ -17,7 +17,7 @@ "0x66 0x0f 0x3a 0x44" ], "ExpectedArm64ASM": [ - "unallocated (Unallocated)" + "pmull v16.1q, v16.1d, v17.1d" ] }, "pclmulqdq xmm0, xmm1, 00001b": { @@ -27,7 +27,7 @@ ], "ExpectedArm64ASM": [ "dup v0.2d, v16.d[1]", - "unallocated (Unallocated)" + "pmull v16.1q, v0.1d, v17.1d" ] }, "pclmulqdq xmm0, xmm1, 10000b": { @@ -37,7 +37,7 @@ ], "ExpectedArm64ASM": [ "dup v0.2d, v17.d[1]", - "unallocated (Unallocated)" + "pmull v16.1q, v0.1d, v16.1d" ] }, "pclmulqdq xmm0, xmm1, 10001b": { @@ -46,7 +46,7 @@ "0x66 0x0f 0x3a 0x44" ], "ExpectedArm64ASM": [ - "unallocated (Unallocated)" + "pmull2 v16.1q, v16.2d, v17.2d" ] }, "aeskeygenassist xmm0, xmm1, 0": { diff --git a/unittests/InstructionCountCI/VEX_map3.json b/unittests/InstructionCountCI/VEX_map3.json index 94612c74d9..b410199957 100644 --- a/unittests/InstructionCountCI/VEX_map3.json +++ b/unittests/InstructionCountCI/VEX_map3.json @@ -4102,7 +4102,7 @@ "Map 3 0b01 0x44 128-bit" ], "ExpectedArm64ASM": [ - "unallocated (Unallocated)" + "pmull v16.1q, v17.1d, v18.1d" ] }, "vpclmulqdq xmm0, xmm1, xmm2, 00001b": { @@ -4112,7 +4112,7 @@ ], "ExpectedArm64ASM": [ "dup v0.2d, v17.d[1]", - "unallocated (Unallocated)" + "pmull v16.1q, v0.1d, v18.1d" ] }, "vpclmulqdq xmm0, xmm1, xmm2, 10000b": { @@ -4122,7 +4122,7 @@ ], "ExpectedArm64ASM": [ "dup v0.2d, v18.d[1]", - "unallocated (Unallocated)" + "pmull v16.1q, v0.1d, v17.1d" ] }, "vpclmulqdq xmm0, xmm1, xmm2, 10001b": { @@ -4131,7 +4131,7 @@ "Map 3 0b01 0x44 128-bit" ], "ExpectedArm64ASM": [ - "unallocated (Unallocated)" + "pmull2 v16.1q, v17.2d, v18.2d" ] }, "vpclmulqdq ymm0, ymm1, ymm2, 00000b": {