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Merge branch 'isa_shift_improve' into 'devel'
Improving timing and resource consuming in SHIFT and MUX. See merge request ndk/ndk-fpga!364
2 parents 1039ef4 + 8c8384e commit d176c6d

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17 files changed

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-737
lines changed

17 files changed

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comp/axis_tools/flow/switch/comp/switch_fabric/comp/islip/comp/priority_enc/priority_enc.vhd

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -32,9 +32,10 @@ architecture FULL of PRIORITY_ENC is
3232

3333
begin
3434

35-
barrel_bit_rotator_right_i : entity work.BARREL_BIT_SHIFTER(barrel_bit_shifter_arch)
35+
barrel_bit_rotator_right_i : entity work.BARREL_SHIFTER_GEN
3636
generic map (
37-
DATA_WIDTH => DATA_WIDTH,
37+
BLOCKS => DATA_WIDTH,
38+
BLOCK_SIZE => 1,
3839
SHIFT_LEFT => false
3940
)
4041
port map (
@@ -52,9 +53,10 @@ begin
5253
DO => s_priority_r
5354
);
5455

55-
barrel_bit_rotator_left_i : entity work.BARREL_BIT_SHIFTER(barrel_bit_shifter_arch)
56+
barrel_bit_rotator_left_i : entity work.BARREL_SHIFTER_GEN
5657
generic map (
57-
DATA_WIDTH => DATA_WIDTH,
58+
BLOCKS => DATA_WIDTH,
59+
BLOCK_SIZE => 1,
5860
SHIFT_LEFT => true
5961
)
6062
port map (

comp/base/logic/barrel_shifter/Modules.tcl

Lines changed: 1 addition & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -10,9 +10,6 @@
1010
set PKG_BASE "$OFM_PATH/comp/base/pkg"
1111
set MUX_BASE "$OFM_PATH/comp/base/logic/mux"
1212

13-
# barrel_bit_shifter entity:
14-
set MOD "$MOD $ENTITY_BASE/barrel_bit_shifter_ent.vhd"
15-
1613
if { $ARCHGRP == "FULL" } {
1714

1815
set COMPONENTS [list \
@@ -21,24 +18,12 @@ if { $ARCHGRP == "FULL" } {
2118
[list "PKG_TYPE" $PKG_BASE "TYPE"] \
2219
]
2320

24-
set MOD "$MOD $ENTITY_BASE/barrel_bit_rotator.vhd"
25-
set MOD "$MOD $ENTITY_BASE/barrel_shifter.vhd"
2621
set MOD "$MOD $ENTITY_BASE/barrel_shifter_gen.vhd"
22+
set MOD "$MOD $ENTITY_BASE/barrel_shifter.vhd"
2723
set MOD "$MOD $ENTITY_BASE/barrel_shifter_gen_piped.vhd"
2824

2925
}
3026

31-
if { $ARCHGRP == "SHIFTER" } {
32-
33-
set COMPONENTS [list \
34-
[list "PKG_MATH" $PKG_BASE "MATH"] \
35-
[list "GENMUX" $MUX_BASE "FULL"] \
36-
]
37-
38-
set MOD "$MOD $ENTITY_BASE/barrel_bit_shifter.vhd"
39-
40-
}
41-
4227
# -----------------------------------------------------------------------------
4328

4429
if { $ARCHGRP == "EMPTY" } {

comp/base/logic/barrel_shifter/barrel_bit_rotator.vhd

Lines changed: 0 additions & 41 deletions
This file was deleted.

comp/base/logic/barrel_shifter/barrel_bit_shifter.vhd

Lines changed: 0 additions & 104 deletions
This file was deleted.

comp/base/logic/barrel_shifter/barrel_bit_shifter_ent.vhd

Lines changed: 0 additions & 36 deletions
This file was deleted.
Lines changed: 20 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -1,26 +1,20 @@
1-
--
21
-- barrel_shifter.vhd Barrel shifter with generic data width
3-
-- Copyright (C) 2009 CESNET
4-
-- Author(s): Vaclav Bartos <washek@liberouter.org>
2+
-- Copyright (C) 2026 CESNET
3+
-- Author(s): Radek Iša <isa@cesnet.cz>
54
--
65
-- SPDX-License-Identifier: BSD-3-Clause
76
--
8-
-- $Id$
9-
--
10-
-- TODO:
11-
--
127

138
library IEEE;
149
use IEEE.std_logic_1164.all;
15-
use IEEE.std_logic_arith.all;
16-
use IEEE.std_logic_unsigned.all;
10+
use IEEE.numeric_std.all;
1711

1812
use work.math_pack.all;
1913

2014
-- ----------------------------------------------------------------------------
2115
-- ENTITY DECLARATION -- Barrel shifter --
2216
-- ----------------------------------------------------------------------------
23-
17+
-- Note: please prefr BARREL_SHIFTER_GEN instead
2418
entity BARREL_SHIFTER is
2519
generic (
2620
DATA_WIDTH : integer := 64;
@@ -36,33 +30,26 @@ entity BARREL_SHIFTER is
3630
);
3731
end entity;
3832

39-
-- ----------------------------------------------------------------------------
40-
-- ARCHITECTURE DECLARATION --
41-
-- ----------------------------------------------------------------------------
4233

4334
architecture BARREL_SHIFTER_ARCH of BARREL_SHIFTER is
4435
constant BLOCK_WIDTH : natural := DATA_WIDTH / BLOCKS;
4536
begin
4637

47-
assert DATA_WIDTH mod BLOCKS = 0
48-
report "DATA_WIDTH is not multiple of BLOCKS"
49-
severity Failure;
50-
51-
multiplexors: for i in 0 to BLOCKS-1 generate
52-
process (DATA_IN, SEL)
53-
variable sel_aux : integer;
54-
variable sel_blk : integer;
55-
begin
56-
if (SHIFT_LEFT) then
57-
sel_aux := conv_integer('0'&SEL);
58-
else
59-
sel_aux := conv_integer('0'&(0-SEL));
60-
end if;
61-
62-
sel_blk := ((BLOCKS-sel_aux+i) mod BLOCKS);
38+
assert (DATA_WIDTH mod BLOCKS = 0)
39+
report "DATA_WIDTH must be divisible by BLOCK"
40+
severity failure;
41+
42+
shifter_inst : entity work.BARREL_SHIFTER_GEN
43+
generic map (
44+
BLOCKS => BLOCKS,
45+
BLOCK_SIZE => BLOCK_WIDTH,
46+
SHIFT_LEFT => SHIFT_LEFT
47+
)
48+
port map (
49+
DATA_IN => DATA_IN,
50+
DATA_OUT => DATA_OUT,
51+
SEL => SEL
52+
);
53+
end architecture;
6354

64-
DATA_OUT((i+1)*BLOCK_WIDTH-1 downto i*BLOCK_WIDTH) <= DATA_IN((sel_blk+1)*BLOCK_WIDTH-1 downto sel_blk*BLOCK_WIDTH);
65-
end process;
66-
end generate;
6755

68-
end architecture;

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