diff --git a/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_ptile.vhd b/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_ptile.vhd
index 579803831..88e393704 100644
--- a/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_ptile.vhd
+++ b/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_ptile.vhd
@@ -1080,7 +1080,7 @@ begin
     -- =========================================================================
 
     dt_g : for i in 0 to PCIE_ENDPOINTS-1 generate
-        constant dt_en : boolean := (i = 0);
+        constant dt_en : boolean := true;
     begin
         cii2cfg_ext_i: entity work.PCIE_CII2CFG_EXT
         port map(
diff --git a/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_rtile.vhd b/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_rtile.vhd
index 52be0415f..9234f60e7 100644
--- a/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_rtile.vhd
+++ b/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_rtile.vhd
@@ -1287,7 +1287,7 @@ begin
     -- =========================================================================
 
     dt_g : for i in 0 to PCIE_ENDPOINTS-1 generate
-        constant dt_en : boolean := (i = 0);
+        constant dt_en : boolean := true;
     begin
         cii2cfg_ext_i: entity work.PCIE_CII2CFG_EXT
         port map(
diff --git a/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_usp.vhd b/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_usp.vhd
index 104d46906..bedda70d9 100644
--- a/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_usp.vhd
+++ b/core/comp/pcie/pcie_mod/comp/pcie_core/pcie_core_usp.vhd
@@ -1492,7 +1492,7 @@ begin
     -- =========================================================================
 
     dt_g : for i in 0 to PCIE_ENDPOINTS-1 generate
-        constant dt_en : boolean := (i = 0);
+        constant dt_en : boolean := true;
     begin
         -- Device Tree ROM
         pci_ext_cap_i: entity work.PCI_EXT_CAP