diff --git a/CHANGELOG.md b/CHANGELOG.md index b9585140e..020adf464 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,21 +7,16 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## [Unreleased] -### Added - -- Added CHANGELOG.md file. - -### Changed - -- Update persistent recipients for notifications of verifications in Jenkins. - -### Removed - -- Removed build jenkins files of APP-Minimal for DK-DEV-AGI027RES card. +## [0.7.1] - 2024-10-16 ### Fixed -- Fixed paths in build jenkins files of APP-Minimal. +- Fixed PCIE0 path for pblock to SLR1 on Netcope NFB-200G2QL card (private submodule). +- Fixed single-bit input problem on Agilex DSP counters in new Quartus. +- Fixed coding style in lots of files. +- Fixed Modules.tcl paths due to compatibility with new NDK-FPGA in external APPs. +- Fixed verification jenkins files. +- Fixed build jenkins files of APP-Minimal. ## [0.7.0] - 2024-10-09 diff --git a/VERSION b/VERSION index faef31a43..39e898a4f 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -0.7.0 +0.7.1 diff --git a/comp/base/dsp/dsp_counter_intel/comp/dsp_counter_agilex/dsp_counter_agilex_atom.vhd b/comp/base/dsp/dsp_counter_intel/comp/dsp_counter_agilex/dsp_counter_agilex_atom.vhd index d62f47caf..5598d1ae0 100644 --- a/comp/base/dsp/dsp_counter_intel/comp/dsp_counter_agilex/dsp_counter_agilex_atom.vhd +++ b/comp/base/dsp/dsp_counter_intel/comp/dsp_counter_agilex/dsp_counter_agilex_atom.vhd @@ -45,7 +45,10 @@ end entity; architecture STRUCT of DSP_COUNTER_AGILEX_ATOM is + constant COUNT_BY_WIDTH_FIX : natural := max(2, COUNT_BY_WIDTH); + signal clr0 : std_logic; -- input registers do not reset when they are disabled + signal count_by_fix : std_logic_vector(COUNT_BY_WIDTH_FIX-1 downto 0); -- this function enables the input register in the DSP counter according to generic INPUT_REGS function input_reg_0_en (REG_0_EN : boolean) return string is @@ -59,7 +62,7 @@ architecture STRUCT of DSP_COUNTER_AGILEX_ATOM is begin - assert ((COUNT_BY_WIDTH <= 27) and (RESULT_WIDTH <= 64)) + assert ((COUNT_BY_WIDTH_FIX > 1) and (COUNT_BY_WIDTH_FIX <= 27) and (RESULT_WIDTH <= 64)) report "Incorrect input or output width." severity failure; -- the reset signal is passed down to the input registers only when they are enabled @@ -69,10 +72,14 @@ begin clr0 <= RESET; end generate; + -- Bugfix: Quartus 24.1 has a problem with the counter, which has a single-bit input and is implemented using AGILEX DSP. + -- This error is manifested by the message: "has unconnected port CLK[1] -- port must be connected because corresponding register is used" + count_by_fix <= std_logic_vector(resize(unsigned(COUNT_BY), COUNT_BY_WIDTH_FIX)); + dsp_i: component tennm_mac generic map ( ax_width => 1, -- the value is always 1, so signal ax is 1-bit wide and by assigning value (others => '1') it then has value of 1 in dec - ay_scan_in_width => COUNT_BY_WIDTH, -- input width + ay_scan_in_width => COUNT_BY_WIDTH_FIX, -- input width result_a_width => RESULT_WIDTH, operation_mode => "m27x27", -- mode with inputs up to 27 bits wide ay_scan_in_clken => input_reg_0_en(REG_0_EN), -- input registers are enabled by ena(0) if input registers are enabled @@ -89,7 +96,7 @@ begin clr(1) => RESET, -- resets output registers (and pipeline registers, which are not used here) accumulate => '1', -- always '1' in the counter arrangement negate => COUNT_DOWN, -- option to count down (it makes 2's complement of the COUNT_BY signal) - ay => COUNT_BY, -- increment (or decrement) by this value + ay => count_by_fix, -- increment (or decrement) by this value ax => (others => '1'), -- this is the other input of the multiplier, must be always 1 else the counter will incerment by the input data multiplied by this number cy => (others => '0'), cx => (others => '0'), diff --git a/comp/nic/mac_lite/rx_mac_lite/comp/crc_check/Modules.tcl b/comp/nic/mac_lite/rx_mac_lite/comp/crc_check/Modules.tcl index 31e4a3180..fbb0481ba 100644 --- a/comp/nic/mac_lite/rx_mac_lite/comp/crc_check/Modules.tcl +++ b/comp/nic/mac_lite/rx_mac_lite/comp/crc_check/Modules.tcl @@ -11,7 +11,7 @@ set CRC_CUTTER_BASE "$OFM_PATH/comp/nic/mac_lite/rx_mac_lite/comp/crc_cutter" # This submodule is not open-source. # Due to licensing reasons, it is not available in the OFM repository. -set MFB_CRC32_ETH_BASE "$OFM_PATH/../modules/fokus/mfb_tools/proc/crc32_ethernet" +set MFB_CRC32_ETH_BASE "$OFM_PATH/../extra/fokus/mfb_tools/proc/crc32_ethernet" set PACKAGES "$PACKAGES $PKG_BASE/math_pack.vhd" set PACKAGES "$PACKAGES $PKG_BASE/type_pack.vhd" diff --git a/comp/nic/mac_lite/rx_mac_lite/top/umii/ver/Modules.tcl b/comp/nic/mac_lite/rx_mac_lite/top/umii/ver/Modules.tcl index ce46c5233..1c17e261d 100644 --- a/comp/nic/mac_lite/rx_mac_lite/top/umii/ver/Modules.tcl +++ b/comp/nic/mac_lite/rx_mac_lite/top/umii/ver/Modules.tcl @@ -6,7 +6,7 @@ # Set paths -set SV_CRC_BASE "$OFM_PATH/../modules/internal/base/ff/crc32" +set SV_CRC_BASE "$OFM_PATH/../extra/internal/base/ff/crc32" set SV_MFB_BASE "$OFM_PATH/comp/mfb_tools/ver" set SV_MVB_BASE "$OFM_PATH/comp/mvb_tools/ver" set SV_MI32_BASE "$OFM_PATH/comp/mi_tools/ver" diff --git a/comp/nic/mac_lite/rx_mac_lite/ver/Modules.tcl b/comp/nic/mac_lite/rx_mac_lite/ver/Modules.tcl index 94349c417..b168099ff 100644 --- a/comp/nic/mac_lite/rx_mac_lite/ver/Modules.tcl +++ b/comp/nic/mac_lite/rx_mac_lite/ver/Modules.tcl @@ -6,7 +6,7 @@ # Set paths -set SV_CRC_BASE "$OFM_PATH/../modules/internal/base/ff/crc32" +set SV_CRC_BASE "$OFM_PATH/../extra/internal/base/ff/crc32" set SV_MFB_BASE "$OFM_PATH/comp/mfb_tools/ver" set SV_MVB_BASE "$OFM_PATH/comp/mvb_tools/ver" set SV_MI32_BASE "$OFM_PATH/comp/mi_tools/ver" diff --git a/comp/nic/mac_lite/tx_mac_lite/comp/crc_gen/Modules.tcl b/comp/nic/mac_lite/tx_mac_lite/comp/crc_gen/Modules.tcl index 9f30878a8..82721765a 100644 --- a/comp/nic/mac_lite/tx_mac_lite/comp/crc_gen/Modules.tcl +++ b/comp/nic/mac_lite/tx_mac_lite/comp/crc_gen/Modules.tcl @@ -8,7 +8,7 @@ set PKG_BASE "$OFM_PATH/comp/base/pkg" # This submodule is not open-source. # Due to licensing reasons, it is not available in the OFM repository. -set MFB_CRC32_ETH_BASE "$OFM_PATH/../modules/fokus/mfb_tools/proc/crc32_ethernet" +set MFB_CRC32_ETH_BASE "$OFM_PATH/../extra/fokus/mfb_tools/proc/crc32_ethernet" set PACKAGES "$PACKAGES $PKG_BASE/math_pack.vhd" set PACKAGES "$PACKAGES $PKG_BASE/type_pack.vhd" diff --git a/comp/nic/ver/Modules.tcl b/comp/nic/ver/Modules.tcl index cc1c1a28f..0b2a9829f 100644 --- a/comp/nic/ver/Modules.tcl +++ b/comp/nic/ver/Modules.tcl @@ -5,7 +5,7 @@ # SPDX-License-Identifier: BSD-3-Clause -set SV_CRC_BASE "$OFM_PATH/../modules/internal/base/ff/crc32" +set SV_CRC_BASE "$OFM_PATH/../extra/internal/base/ff/crc32" set SV_COMMON_BASE "$OFM_PATH/comp/ver" set COMPONENTS [list \ diff --git a/core/comp/eth/network_mod/comp/network_mod_core/Modules.tcl b/core/comp/eth/network_mod/comp/network_mod_core/Modules.tcl index c7fef670a..ca44e3d44 100644 --- a/core/comp/eth/network_mod/comp/network_mod_core/Modules.tcl +++ b/core/comp/eth/network_mod/comp/network_mod_core/Modules.tcl @@ -16,7 +16,7 @@ set DK_AGI_IP_BASE "$CARDS_BASE/dk-dev-agi027res/src/ip" set AGI_FH400G_IP_BASE "$CARDS_BASE/agi-fh400g/src/ip" set CMAC_IP_BASE "$CARDS_BASE/fb4cgg3/src/ip" set 40GE_BASE "$OFM_PATH/comp/nic/eth_phy/40ge" -set LL10GE40GE_BASE "$OFM_PATH/../modules/hft/comp/net_mod/top" +set LL10GE40GE_BASE "$OFM_PATH/../extra/hft/comp/net_mod/top" set FIFO_BASE "$OFM_PATH/comp/base/fifo" set MI_SPLITTER_BASE "$OFM_PATH/comp/mi_tools/splitter_plus_gen" set BASE_LOGIC_BASE "$OFM_PATH/comp/base/logic" diff --git a/extra/nfb-200g2ql b/extra/nfb-200g2ql index 9d2424f09..40de643fd 160000 --- a/extra/nfb-200g2ql +++ b/extra/nfb-200g2ql @@ -1 +1 @@ -Subproject commit 9d2424f09c1dd3ef530aa4e48b8673ac02d07844 +Subproject commit 40de643fdb8dc078c95c640ba4f5f6e77390871d