From 6ea4ce04351f874b301bd5b36677019e3807cecc Mon Sep 17 00:00:00 2001 From: Radek Isa Date: Tue, 14 Jan 2025 14:47:20 +0100 Subject: [PATCH] fix(pcie-adapter-uvm): remove check of deasertion ready signal for P_TILE --- .../comp/pcie_adapter/uvm/tbench/dut.sv | 7 +++++-- .../comp/pcie_adapter/uvm/tbench/property.sv | 20 +++++++++++-------- .../comp/pcie_adapter/uvm/tbench/testbench.sv | 2 ++ 3 files changed, 19 insertions(+), 10 deletions(-) diff --git a/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/dut.sv b/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/dut.sv index 3fcf724bd..7a544fd91 100644 --- a/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/dut.sv +++ b/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/dut.sv @@ -57,8 +57,11 @@ module DUT ( assign down_prefix [(r+1)*PREFIX_WIDTH-1 : r*PREFIX_WIDTH] = avst_down.META[(r+1)*AVST_DOWN_META_W - BAR_RANGE_WIDTH-1 : (r+1)*AVST_DOWN_META_W - PREFIX_WIDTH - BAR_RANGE_WIDTH]; assign down_hdr [(r+1)*HDR_WIDTH-1 : r*HDR_WIDTH] = avst_down.META[(r+1)*AVST_DOWN_META_W - PREFIX_WIDTH - BAR_RANGE_WIDTH-1 : (r+1)*AVST_DOWN_META_W - HDR_WIDTH - PREFIX_WIDTH - BAR_RANGE_WIDTH]; - //assign down_valid[r] = avst_down.VALID[r]; - assign down_valid[r] = avst_down.VALID[r] & down_ready; + if (ENDPOINT_TYPE == "R_TILE") begin + assign down_valid[r] = avst_down.VALID[r] & down_ready; + end else begin + assign down_valid[r] = avst_down.VALID[r]; + end end for (genvar r = 0; r < CC_MFB_REGIONS; r++) begin diff --git a/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/property.sv b/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/property.sv index 1cce5c45a..3975e1a58 100644 --- a/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/property.sv +++ b/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/property.sv @@ -9,6 +9,8 @@ import uvm_pkg::*; module PROPERTY #( + string ENDPOINT_TYPE, + int unsigned RC_MFB_REGIONS, int unsigned RC_MFB_REGION_SIZE, int unsigned RC_MFB_BLOCK_SIZE, @@ -81,14 +83,16 @@ module PROPERTY #( .vif (cq_mfb) ); - property no_fall_init; - @(posedge avst_down.CLK) disable iff(RST || START) - $rose(avst_down.READY) |=> always avst_down.READY; - endproperty + generate if (ENDPOINT_TYPE == "R_TILE") begin + property no_fall_init; + @(posedge avst_down.CLK) disable iff(RST || START) + $rose(avst_down.READY) |=> always avst_down.READY; + endproperty - assert property (no_fall_init) - else begin - `uvm_error(module_name, "\n\tAVST DONW interface brouke protocol. READY signal fall down after inintialization"); - end + assert property (no_fall_init) + else begin + `uvm_error(module_name, "\n\tAVST DOWN interface broke protocol R_TILE. The READY signal falls down after inintialization"); + end + end endgenerate endmodule diff --git a/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/testbench.sv b/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/testbench.sv index c14f19828..26cd24a3b 100644 --- a/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/testbench.sv +++ b/core/comp/pcie/pcie_mod/comp/pcie_adapter/uvm/tbench/testbench.sv @@ -97,6 +97,8 @@ module testbench; PROPERTY #( + .ENDPOINT_TYPE (ENDPOINT_TYPE), + .RC_MFB_REGIONS (RC_MFB_REGIONS ), .RC_MFB_REGION_SIZE(RC_MFB_REGION_SIZE), .RC_MFB_BLOCK_SIZE (RC_MFB_BLOCK_SIZE ),