From 90fb84ab4e0bc2e5e2ac6329d6fc392bc8606820 Mon Sep 17 00:00:00 2001 From: Martin Spinler Date: Fri, 11 Oct 2024 10:13:22 +0200 Subject: [PATCH 1/4] build: [FEATURE] add PLATFORM_TAGS variable for platform --- build/Modelsim.inc.fdo | 8 ++++++++ build/Quartus.inc.tcl | 7 +++++++ build/Shared.tcl | 3 +++ build/Synplify.inc.tcl | 4 ++++ build/Vivado.inc.tcl | 7 +++++++ build/Vivado_non_prj.inc.tcl | 4 ++++ build/readme.rst | 21 +++++++++++++++++++++ 7 files changed, 54 insertions(+) diff --git a/build/Modelsim.inc.fdo b/build/Modelsim.inc.fdo index 781ee1997..4887892c5 100644 --- a/build/Modelsim.inc.fdo +++ b/build/Modelsim.inc.fdo @@ -294,6 +294,14 @@ proc nb_sim_sanitize_vars {user_sim_flags sim_flags hierarchy VARS} { lappend MOD lappend TB_FILE + global NB_PLATFORM_TAGS env + + if {[info exists env(PLATFORM_TAGS)]} { + set NB_PLATFORM_TAGS "$env(PLATFORM_TAGS)" + } else { + set NB_PLATFORM_TAGS "altera xilinx" + } + set HIERARCHY(PACKAGES) $PACKAGES set HIERARCHY(COMPONENTS) $COMPONENTS set HIERARCHY(MOD) $MOD diff --git a/build/Quartus.inc.tcl b/build/Quartus.inc.tcl index 7c4f6ac80..f3b19185f 100644 --- a/build/Quartus.inc.tcl +++ b/build/Quartus.inc.tcl @@ -588,6 +588,13 @@ proc nb_sanitize_vars {synth_flags hierarchy} { set SYNTH_FLAGS(TOOL) "quartus" + global NB_PLATFORM_TAGS env + if {[info exists env(PLATFORM_TAGS)]} { + set NB_PLATFORM_TAGS "$env(PLATFORM_TAGS)" + } else { + set NB_PLATFORM_TAGS "altera" + } + # Set default values if {![info exists SYNTH_FLAGS(PROJ_ONLY)]} { set SYNTH_FLAGS(PROJ_ONLY) false diff --git a/build/Shared.tcl b/build/Shared.tcl index aba6d3cb2..91b7258d4 100644 --- a/build/Shared.tcl +++ b/build/Shared.tcl @@ -347,8 +347,11 @@ proc ApplyToComponent {COMPONENT COMMAND FILES SV_LIBS LEVEL EVAL_COMP} { # script execution ---------------------------- global NB_COMP_BASE + global NB_PLATFORM_TAGS global OFM_PATH global FIRMWARE_BASE + + set PLATFORM_TAGS $NB_PLATFORM_TAGS set COMP_BASE $NB_COMP_BASE set MOD "" set SV_LIB "" diff --git a/build/Synplify.inc.tcl b/build/Synplify.inc.tcl index 3e8c033cf..73ac33ee6 100644 --- a/build/Synplify.inc.tcl +++ b/build/Synplify.inc.tcl @@ -247,6 +247,10 @@ proc nb_sanitize_vars {synth_flags hierarchy} { set SYNTH_FLAGS(TOOL) "synplify" + global NB_PLATFORM_TAGS + global PLATFORM_TAGS + set NB_PLATFORM_TAGS "$PLATFORM_TAGS" + # Set default values if {![info exists SYNTH_FLAGS(PROJ_ONLY)]} { set SYNTH_FLAGS(PROJ_ONLY) false diff --git a/build/Vivado.inc.tcl b/build/Vivado.inc.tcl index 3c59f4423..3d4342d37 100644 --- a/build/Vivado.inc.tcl +++ b/build/Vivado.inc.tcl @@ -719,6 +719,13 @@ proc nb_sanitize_vars {synth_flags hierarchy} { set SYNTH_FLAGS(TOOL) "vivado" + global NB_PLATFORM_TAGS env + if {[info exists env(PLATFORM_TAGS)]} { + set NB_PLATFORM_TAGS "$env(PLATFORM_TAGS)" + } else { + set NB_PLATFORM_TAGS "xilinx" + } + if {[info commands version] != ""} { set SYNTH_FLAGS(TOOL_VERSION) [version -short] } else { diff --git a/build/Vivado_non_prj.inc.tcl b/build/Vivado_non_prj.inc.tcl index b9b4e51e9..1467b6792 100644 --- a/build/Vivado_non_prj.inc.tcl +++ b/build/Vivado_non_prj.inc.tcl @@ -655,6 +655,10 @@ proc nb_sanitize_vars {synth_flags hierarchy} { set SYNTH_FLAGS(TOOL) "vivado" + global NB_PLATFORM_TAGS + global PLATFORM_TAGS + set NB_PLATFORM_TAGS "xilinx $PLATFORM_TAGS" + if {[info commands version] != ""} { set SYNTH_FLAGS(TOOL_VERSION) [version -short] } else { diff --git a/build/readme.rst b/build/readme.rst index 3a3e25859..fd28131ac 100644 --- a/build/readme.rst +++ b/build/readme.rst @@ -83,6 +83,27 @@ Variables ``ENTITY``, ``ENTITY_BASE`` and ``ARCHGRP`` are predefined (provided) Prefer to use :tcl:`lappend MOD "myfile.vhd"` instead of :tcl:`set MOD "$MOD myfile.vhd"`, because the ``lappend`` better express the operation and is faster. +PLATFORM_TAGS +~~~~~~~~~~~~~ + +In the situation, when a platform (build tool: Quartus, Vivado, simulator: Questa Sim, etc.) supports various architectures / implementation schemes, +the PLATFORM_TAGS list variable can be used to distinguish, which source file should be included into project. + +List of available platforms: + +- **xilinx** - platform supports complete set of Xilinx component and products +- **altera** - platform supports complete set of Intel/Altera component and products + +.. - **empty** - platform, on which the empty architectures are enabled; this is used e.g. when user wants to check the code syntax even if the codebase for toplevel is not completed yet. + +.. If the component doesn't have common/universal platform implementation and the "empty" tag is not in PLATFORM_TAGS, the process should exit with error. + +Those tags are currently not available, but show the way of potential extension and usage: + +- **vivado:ge_2024.0** - Vivado version is equal or greater than 2024.0 (this doesn't means automatic comparison) +- **xilinx:usp** - Restrict for UltraScale+ platform. +- **xilinx:sim:gty** - Inculde simulation models from highspeed transceivers. + .. _extra file properties: List of properties used in MOD variables From 40e0a9b5a20d2616a9506cad6be80e443d218f32 Mon Sep 17 00:00:00 2001 From: Martin Spinler Date: Fri, 11 Oct 2024 10:13:54 +0200 Subject: [PATCH 2/4] build: [FEATURE] add nb_preference_filter for preferred platform tag --- build/Shared.tcl | 10 ++++++++++ build/readme.rst | 14 ++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/build/Shared.tcl b/build/Shared.tcl index 91b7258d4..e7cdd6a91 100644 --- a/build/Shared.tcl +++ b/build/Shared.tcl @@ -36,6 +36,16 @@ proc nb_batch_finish {} { } } +proc nb_preference_filter {PLATFORM_TAGS SUPPORTED_TAGS} { + set preferred "" + foreach tag $PLATFORM_TAGS { + if {$tag in $SUPPORTED_TAGS} { + set preferred $tag + } + } + return $preferred +} + # ---------------------- Common procedures ---------------------------- # String Generation proc GenStr {NUM CH} { diff --git a/build/readme.rst b/build/readme.rst index fd28131ac..2b9f2b337 100644 --- a/build/readme.rst +++ b/build/readme.rst @@ -104,6 +104,20 @@ Those tags are currently not available, but show the way of potential extension - **xilinx:usp** - Restrict for UltraScale+ platform. - **xilinx:sim:gty** - Inculde simulation models from highspeed transceivers. +Priority for PLATFORM_TAGS +^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The PLATFORM_TAGS list can be potentially used also for specifying preference/priority (latter position in list means higher priority): +``set PLATFORM_TAGS "xilinx:bram:behav xilinx:bram:macro"`` +The priority can be easily overriden simply by appending item to the list. +(Also the ``lsearch`` can be easily used as returns -1 for non-existing item, which means lowest priority.) +In general, the highest priority tag from set of supported tags can be obtained by the ``proc nb_preference_filter {PLATFORM_TAGS SUPPORTED_TAGS}`` + + .. code-block:: tcl + + set SUPPORTED_PLATFORM_TAGS "xilinx altera" + set TARGET_TAG [nb_preference_filter $PLATFORM_TAGS $SUPPORTED_PLATFORM_TAGS] + .. _extra file properties: List of properties used in MOD variables From 094209d096945a0b199a830ae10f7d57478d9dd3 Mon Sep 17 00:00:00 2001 From: Martin Spinler Date: Fri, 11 Oct 2024 10:22:38 +0200 Subject: [PATCH 3/4] Modules.tcl: [MAINTENANCE/FIX] replace SYNTH_FLAGS(TOOL) with PLATFORM_TAGS --- .../base/dsp/dsp_comparator_intel/Modules.tcl | 12 ++----- comp/base/dsp/dsp_counter_intel/Modules.tcl | 8 ++--- comp/base/fifo/fifo_bram_xilinx/Modules.tcl | 7 ++--- comp/base/logic/cmp/comp/cmp_dsp/Modules.tcl | 12 ++----- comp/base/logic/count/Modules.tcl | 11 ++----- comp/base/mem/gen_lutram/altdpram/Modules.tcl | 7 ++--- .../mem/sdp_bram/sdp_bram_intel/Modules.tcl | 7 ++--- .../mem/sdp_bram/sdp_bram_xilinx/Modules.tcl | 7 ++--- comp/tsu/tsu_gen/Modules.tcl | 31 +++++++------------ .../tsu/tsu_gen/comp/tsu_gen_core/Modules.tcl | 8 ++--- 10 files changed, 38 insertions(+), 72 deletions(-) diff --git a/comp/base/dsp/dsp_comparator_intel/Modules.tcl b/comp/base/dsp/dsp_comparator_intel/Modules.tcl index a1f9d279e..601476cdf 100644 --- a/comp/base/dsp/dsp_comparator_intel/Modules.tcl +++ b/comp/base/dsp/dsp_comparator_intel/Modules.tcl @@ -4,8 +4,6 @@ # # SPDX-License-Identifier: BSD-3-Clause -global SYNTH_FLAGS - # Set paths set PKG_BASE "$OFM_PATH/comp/base/pkg" @@ -19,17 +17,13 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/ver/vhdl_ver_tools/basics/basics_test_pkg set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel_ent.vhd" -if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "vivado" } { - - set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel_empty.vhd" - -} else { - +if {"altera" in $PLATFORM_TAGS} { set COMPONENTS [list \ [list "AGILEX_COMP" $AGILEX_BASE "FULL"] \ [list "STRATIX10_COMP" $STRATIX10_BASE "FULL"] \ ] set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel.vhd" - +} else { + set MOD "$MOD $ENTITY_BASE/dsp_comparator_intel_empty.vhd" } diff --git a/comp/base/dsp/dsp_counter_intel/Modules.tcl b/comp/base/dsp/dsp_counter_intel/Modules.tcl index dac48cb15..6aad5424e 100644 --- a/comp/base/dsp/dsp_counter_intel/Modules.tcl +++ b/comp/base/dsp/dsp_counter_intel/Modules.tcl @@ -4,8 +4,6 @@ # # SPDX-License-Identifier: BSD-3-Clause -global SYNTH_FLAGS - # Set paths set PKG_BASE "$OFM_PATH/comp/base/pkg" set INTEL_CNT_COMP_BASE "$OFM_PATH/comp/base/dsp/dsp_counter_intel/comp" @@ -20,13 +18,13 @@ lappend PACKAGES "$OFM_PATH/comp/ver/vhdl_ver_tools/basics/basics_test_pkg.vhd" lappend MOD "$ENTITY_BASE/dsp_counter_intel_ent.vhd" # choose empty architecure when using Intel DSPs in Vivado -if {[info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "vivado"} { - lappend MOD "$ENTITY_BASE/dsp_counter_intel_empty.vhd" -} else { +if {"altera" in $PLATFORM_TAGS} { set COMPONENTS [list \ [list "AGILEX_CNT" "$INTEL_CNT_COMP_BASE/dsp_counter_stratix10" "STRUCT"] \ [list "STRATIX10_CNT" "$INTEL_CNT_COMP_BASE/dsp_counter_agilex" "STRUCT"] \ ] lappend MOD "$ENTITY_BASE/dsp_counter_intel.vhd" +} else { + lappend MOD "$ENTITY_BASE/dsp_counter_intel_empty.vhd" } diff --git a/comp/base/fifo/fifo_bram_xilinx/Modules.tcl b/comp/base/fifo/fifo_bram_xilinx/Modules.tcl index 115030862..84433623e 100644 --- a/comp/base/fifo/fifo_bram_xilinx/Modules.tcl +++ b/comp/base/fifo/fifo_bram_xilinx/Modules.tcl @@ -9,10 +9,9 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd" set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx_ent.vhd" -global SYNTH_FLAGS -if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus" } { - set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx_empty.vhd" -} else { +if {"xilinx" in $PLATFORM_TAGS} { set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx.vhd" lappend SRCS(CONSTR_VIVADO) [list $ENTITY_BASE/fifo_bram_xilinx.xdc SCOPED_TO_REF FIFO_BRAM_XILINX] +} else { + set MOD "$MOD $ENTITY_BASE/fifo_bram_xilinx_empty.vhd" } diff --git a/comp/base/logic/cmp/comp/cmp_dsp/Modules.tcl b/comp/base/logic/cmp/comp/cmp_dsp/Modules.tcl index 6ebdd2a44..6bbf9aeec 100644 --- a/comp/base/logic/cmp/comp/cmp_dsp/Modules.tcl +++ b/comp/base/logic/cmp/comp/cmp_dsp/Modules.tcl @@ -5,8 +5,6 @@ # # SPDX-License-Identifier: BSD-3-Clause -global SYNTH_FLAGS - set COMPONENTS [ list \ [ list "MATH_PACK" "$OFM_PATH/comp/base/pkg" "MATH" ] \ @@ -14,14 +12,10 @@ set COMPONENTS [ list \ set MOD "$MOD $ENTITY_BASE/cmp_dsp_ent.vhd" -if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus" } { - - set MOD "$MOD $ENTITY_BASE/cmp_dsp_empty.vhd" - -} else { - +if {"xilinx" in $PLATFORM_TAGS} { set MOD "$MOD $ENTITY_BASE/cmp_decode.vhd" set MOD "$MOD $ENTITY_BASE/cmp48.vhd" set MOD "$MOD $ENTITY_BASE/cmp_dsp.vhd" - +} else { + set MOD "$MOD $ENTITY_BASE/cmp_dsp_empty.vhd" } diff --git a/comp/base/logic/count/Modules.tcl b/comp/base/logic/count/Modules.tcl index 708cdb0a4..1fb454e94 100644 --- a/comp/base/logic/count/Modules.tcl +++ b/comp/base/logic/count/Modules.tcl @@ -5,21 +5,16 @@ # # SPDX-License-Identifier: BSD-3-Clause -global SYNTH_FLAGS # Set paths set MOD "$MOD $ENTITY_BASE/count_dsp_ent.vhd" -if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus" } { - - set MOD "$MOD $ENTITY_BASE/count_dsp_empty.vhd" - -} else { - +if {"xilinx" in $PLATFORM_TAGS} { set MOD "$MOD $ENTITY_BASE/count48.vhd" set MOD "$MOD $ENTITY_BASE/count_dsp.vhd" # COUNT_TOP with input and output registers for measurements # set MOD "$MOD $ENTITY_BASE/synth/count_top.vhd" - +} else { + set MOD "$MOD $ENTITY_BASE/count_dsp_empty.vhd" } diff --git a/comp/base/mem/gen_lutram/altdpram/Modules.tcl b/comp/base/mem/gen_lutram/altdpram/Modules.tcl index c7d21d0bc..3fe4ac4cd 100644 --- a/comp/base/mem/gen_lutram/altdpram/Modules.tcl +++ b/comp/base/mem/gen_lutram/altdpram/Modules.tcl @@ -10,9 +10,8 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd" set MOD "$MOD $ENTITY_BASE/altdpram_wrap_ent.vhd" -global SYNTH_FLAGS -if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) != "quartus" } { - set MOD "$MOD $ENTITY_BASE/altdpram_wrap_empty.vhd" -} else { +if {"altera" in $PLATFORM_TAGS} { set MOD "$MOD $ENTITY_BASE/altdpram_wrap.vhd" +} else { + set MOD "$MOD $ENTITY_BASE/altdpram_wrap_empty.vhd" } diff --git a/comp/base/mem/sdp_bram/sdp_bram_intel/Modules.tcl b/comp/base/mem/sdp_bram/sdp_bram_intel/Modules.tcl index 373b67088..e585652e0 100644 --- a/comp/base/mem/sdp_bram/sdp_bram_intel/Modules.tcl +++ b/comp/base/mem/sdp_bram/sdp_bram_intel/Modules.tcl @@ -9,9 +9,8 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd" set MOD "$MOD $ENTITY_BASE/sdp_bram_intel_ent.vhd" -global SYNTH_FLAGS -if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) != "quartus" } { - set MOD "$MOD $ENTITY_BASE/sdp_bram_intel_empty.vhd" -} else { +if {"altera" in $PLATFORM_TAGS} { set MOD "$MOD $ENTITY_BASE/sdp_bram_intel.vhd" +} else { + set MOD "$MOD $ENTITY_BASE/sdp_bram_intel_empty.vhd" } diff --git a/comp/base/mem/sdp_bram/sdp_bram_xilinx/Modules.tcl b/comp/base/mem/sdp_bram/sdp_bram_xilinx/Modules.tcl index ef2a912b2..fb31886ea 100644 --- a/comp/base/mem/sdp_bram/sdp_bram_xilinx/Modules.tcl +++ b/comp/base/mem/sdp_bram/sdp_bram_xilinx/Modules.tcl @@ -9,9 +9,8 @@ set PACKAGES "$PACKAGES $OFM_PATH/comp/base/pkg/type_pack.vhd" set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx_ent.vhd" -global SYNTH_FLAGS -if { [info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) != "vivado" } { - set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx_empty.vhd" -} else { +if {"xilinx" in $PLATFORM_TAGS} { set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx.vhd" +} else { + set MOD "$MOD $ENTITY_BASE/sdp_bram_xilinx_empty.vhd" } diff --git a/comp/tsu/tsu_gen/Modules.tcl b/comp/tsu/tsu_gen/Modules.tcl index 69f96ac91..7834f3b51 100644 --- a/comp/tsu/tsu_gen/Modules.tcl +++ b/comp/tsu/tsu_gen/Modules.tcl @@ -7,8 +7,6 @@ # SPDX-License-Identifier: BSD-3-Clause # -global SYNTH_FLAGS - set TSU_CORE_BASE "$ENTITY_BASE/comp/tsu_gen_core" set MI32_ASYNC_HANDSHAKE_BASE "$OFM_PATH/comp/mi_tools/async" set ASYNC_RESET_BASE "$OFM_PATH/comp/base/async/reset" @@ -22,27 +20,20 @@ set MOD "$MOD $ENTITY_BASE/tsu_gen_ent.vhd" set MOD "$MOD $ENTITY_BASE/mult_1e9_ent.vhd" # components -if {[info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus"} { - - set COMPONENTS [ list \ - [ list "TSU_CORE" $TSU_CORE_BASE "FULL" ] \ - [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL" ] \ - [ list "ASYNC_RESET" $ASYNC_RESET_BASE "FULL" ] \ - [ list "ASYNC_BUS_HANDSHAKE" $ASYNC_HANDSHAKE_BASE "FULL" ] \ - ] - set MOD "$MOD $ENTITY_BASE/mult_1e9_empty.vhd" +set COMPONENTS [ list \ + [ list "TSU_CORE" $TSU_CORE_BASE "FULL" ] \ + [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL" ] \ + [ list "ASYNC_RESET" $ASYNC_RESET_BASE "FULL" ] \ + [ list "ASYNC_BUS_HANDSHAKE" $ASYNC_HANDSHAKE_BASE "FULL" ] \ +] -} else { +if {"xilinx" in $PLATFORM_TAGS} { + lappend COMPONENTS \ + [list "ALU_DSP" $ALU "STRUCTUAL"] - set COMPONENTS [ list \ - [ list "TSU_CORE" $TSU_CORE_BASE "FULL" ] \ - [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL" ] \ - [ list "ASYNC_RESET" $ASYNC_RESET_BASE "FULL" ] \ - [ list "ASYNC_BUS_HANDSHAKE" $ASYNC_HANDSHAKE_BASE "FULL" ] \ - [ list "ALU_DSP" $ALU "STRUCTUAL" ] \ - ] set MOD "$MOD $ENTITY_BASE/mult_1e9.vhd" - +} else { + set MOD "$MOD $ENTITY_BASE/mult_1e9_empty.vhd" } # mods diff --git a/comp/tsu/tsu_gen/comp/tsu_gen_core/Modules.tcl b/comp/tsu/tsu_gen/comp/tsu_gen_core/Modules.tcl index d925ef33d..20a440b19 100644 --- a/comp/tsu/tsu_gen/comp/tsu_gen_core/Modules.tcl +++ b/comp/tsu/tsu_gen/comp/tsu_gen_core/Modules.tcl @@ -7,18 +7,16 @@ # SPDX-License-Identifier: BSD-3-Clause # -global SYNTH_FLAGS - set MI32_ASYNC_HANDSHAKE_BASE "$OFM_PATH/comp/mi_tools/async" set COMPONENTS [list [ list "MI32_ASYNC_HANDSHAKE" $MI32_ASYNC_HANDSHAKE_BASE "FULL" ]] set MOD "$MOD $ENTITY_BASE/tsu_adder_ent.vhd" -if {[info exists SYNTH_FLAGS(TOOL)] && $SYNTH_FLAGS(TOOL) == "quartus"} { - set MOD "$MOD $ENTITY_BASE/tsu_adder_common.vhd" -} else { +if {"xilinx" in $PLATFORM_TAGS} { set MOD "$MOD $ENTITY_BASE/tsu_adder_xilinx.vhd" +} else { + set MOD "$MOD $ENTITY_BASE/tsu_adder_common.vhd" } set MOD "$MOD $ENTITY_BASE/tsu_gen_core.vhd" From 31ccd18254ca8cc97f431f6b53f2d1147e61ced7 Mon Sep 17 00:00:00 2001 From: Martin Spinler Date: Mon, 14 Oct 2024 08:57:23 +0200 Subject: [PATCH 4/4] cocotb simulation: remove SYNTH_TOOL --- build/scripts/cocotb/cocotb.fdo | 4 ---- 1 file changed, 4 deletions(-) diff --git a/build/scripts/cocotb/cocotb.fdo b/build/scripts/cocotb/cocotb.fdo index eb5c8ea94..829949df5 100644 --- a/build/scripts/cocotb/cocotb.fdo +++ b/build/scripts/cocotb/cocotb.fdo @@ -16,16 +16,12 @@ source_with_args $env(SYNTHFILES) "-tnone" set PACKAGES $HIERARCHY(PACKAGES) set COMPONENTS $HIERARCHY(COMPONENTS) -set SYNTH_FLAGS(TOOL) "modelsim" set SIM_FLAGS(EXTRA_VFLAGS) [list -quiet -suppress 1130,1339,8664,8683,8684,8822,12110,1549,143 -L unisims_ver -L secureip] set SIM_FLAGS(MAKEFILE_GEN) true set SIM_FLAGS(MAKEFILE_NAME) simulation.Makefile set SIM_FLAGS(VSIM_MANUAL_START) true set SIM_FLAGS(DEBUG) true -if {[info exists env(SYNTH_TOOL)]} { - set SYNTH_FLAGS(TOOL) $env(SYNTH_TOOL) -} set COCOTB_PATH [eval cocotb-config --lib-name-path fli modelsim] lappend SIM_FLAGS(EXTRA_VFLAGS) -foreign "cocotb_init $COCOTB_PATH"