MLECO-4703: Updates for pack versions

Alif Semiconductor's Ensemble support updated for the AI/ML AppKit
boards. Support for the older revisions of the boards has been
dropped as the CMSIS pack versions available don't support these
older variants.

Most changes are to adapt to the newer pack version. Further changes
are required to get the ILI9806E LCD to work correctly.

Change-Id: If0a912f3a00685cd7314881c45611cac0ceaf109
Signed-off-by: Kshitij Sisodia <[email protected]>

Author: kshitij-sisodia-arm

cmsis-pack-examples/README.md

@@ -34,13 +34,13 @@ Currently, the following examples are supported:
 
 Target platforms supported:
 
-| Name                | Type                | IP                                            | Examples |
-|---------------------|---------------------|-----------------------------------------------|----------|
-| Arm® Corstone™-300  | Virtual or physical | Arm® Cortex®-M55 CPU with Arm® Ethos™-U55 or Arm® Ethos™-U65 NPU | All      |
-| Arm® Corstone™-310  | Virtual or physical | Arm® Cortex®-M85 CPU with Arm® Ethos™-U55 or Arm® Ethos™-U65 NPU | All      |
-| Alif Ensemble E7    | Physical board      | Arm® Cortex®-M55 CPU with Arm® Ethos™-U55 NPU | All      |
-| STM32F746G-Discovery| Physical board      | Arm® Cortex®-M7 CPU                           | KWS      |
-| NXP FRDM-K64F       | Physical board      | Arm® Cortex®-M4 CPU                           | KWS      |
+| Name                  | Type                | IP                                            | Examples |
+|-----------------------|---------------------|-----------------------------------------------|----------|
+| Arm® Corstone™-300    | Virtual or physical | Arm® Cortex®-M55 CPU with Arm® Ethos™-U55 or Arm® Ethos™-U65 NPU | All      |
+| Arm® Corstone™-310    | Virtual or physical | Arm® Cortex®-M85 CPU with Arm® Ethos™-U55 or Arm® Ethos™-U65 NPU | All      |
+| Alif™ Ensemble™ E7 AI/ML Kit | Physical board      | Arm® Cortex®-M55 CPU with Arm® Ethos™-U55 NPU | All      |
+| STM32® F746G-Discovery| Physical board      | Arm® Cortex®-M7 CPU                           | KWS      |
+| NXP® FRDM-K64F        | Physical board      | Arm® Cortex®-M4 CPU                           | KWS      |
 
 
 Use this import button to open the solution in Keil Studio Cloud: [![Open in Keil Studio](https://img.shields.io/badge/Keil%20Studio-Import-blue?logo=data:image/svg+xml;base64,PD94bWwgdmVyc2lvbj0iMS4wIiBlbmNvZGluZz0idXRmLTgiPz4NCjwhLS0gR2VuZXJhdG9yOiBBZG9iZSBJbGx1c3RyYXRvciAyNS40LjEsIFNWRyBFeHBvcnQgUGx1Zy1JbiAuIFNWRyBWZXJzaW9uOiA2LjAwIEJ1aWxkIDApICAtLT4NCjxzdmcgdmVyc2lvbj0iMS4xIiBpZD0iTGF5ZXJfMSIgeG1sbnM9Imh0dHA6Ly93d3cudzMub3JnLzIwMDAvc3ZnIiB4bWxuczp4bGluaz0iaHR0cDovL3d3dy53My5vcmcvMTk5OS94bGluayIgeD0iMHB4IiB5PSIwcHgiDQoJIHZpZXdCb3g9IjAgMCA0NyAxNCIgc3R5bGU9ImVuYWJsZS1iYWNrZ3JvdW5kOm5ldyAwIDAgNDcgMTQ7IiB4bWw6c3BhY2U9InByZXNlcnZlIj4NCjxzdHlsZSB0eXBlPSJ0ZXh0L2NzcyI+DQoJLnN0MHtmaWxsOiNGRkZGRkY7fQ0KPC9zdHlsZT4NCjxwYXRoIGNsYXNzPSJzdDAiIGQ9Ik00LjcsN2MwLDIuMiwxLjQsNC4xLDMuNSw0LjFjMS44LDAsMy42LTEuNCwzLjYtNC4xYzAtMi44LTEuNy00LjItMy42LTQuMkM2LjIsMi45LDQuNyw0LjcsNC43LDcgTTExLjYsMC41DQoJaDIuOXYxM2gtMi45di0xLjNjLTAuOSwxLjEtMi4zLDEuNy0zLjcsMS43QzQsMTMuOSwxLjgsMTAuNiwxLjgsN2MwLTQuMywyLjctNi45LDYuMS02LjljMS41LDAsMi44LDAuNywzLjcsMS45VjAuNXoiLz4NCjxwYXRoIGNsYXNzPSJzdDAiIGQ9Ik0xOCwwLjVIMjF2MS4yYzAuMy0wLjQsMC43LTAuOCwxLjItMS4xYzAuNS0wLjMsMS4yLTAuNCwxLjctMC40YzAuOCwwLDEuNiwwLjIsMi4zLDAuNmwtMS4yLDIuOA0KCWMtMC40LTAuMy0xLTAuNC0xLjUtMC40Yy0wLjctMC4xLTEuMywwLjItMS44LDAuN0MyMSw0LjYsMjEsNS45LDIxLDYuOHY2LjdIMThWMC41eiIvPg0KPHBhdGggY2xhc3M9InN0MCIgZD0iTTI4LjIsMC41aDIuOXYxLjJjMC43LTAuOSwxLjktMS42LDMuMS0xLjZjMS4zLDAsMi42LDAuNywzLjIsMS45YzAuOS0xLjIsMi4yLTEuOSwzLjctMS45DQoJQzQyLjcsMCw0NCwwLjksNDQuNywyLjJjMC4yLDAuNCwwLjcsMS40LDAuNywzLjN2OC4xaC0yLjlWNi4zYzAtMS41LTAuMi0yLjEtMC4yLTIuM2MtMC4yLTAuNy0wLjktMS4yLTEuNy0xLjENCgljLTAuNywwLTEuMywwLjMtMS43LDAuOWMtMC41LDAuOC0wLjYsMS45LTAuNiwyLjl2Ni43aC0yLjlWNi4zYzAtMS41LTAuMi0yLjEtMC4yLTIuM2MtMC4yLTAuNy0wLjktMS4yLTEuNy0xLjENCgljLTAuNywwLTEuMywwLjMtMS43LDAuOWMtMC41LDAuOC0wLjYsMS45LTAuNiwyLjl2Ni43aC0yLjlMMjguMiwwLjV6Ii8+DQo8L3N2Zz4NCg==&logoWidth=47)](https://studio.keil.arm.com/?import=https://github.com/Arm-Examples/mlek-cmsis-pack-examples.git)
@@ -224,17 +224,18 @@ Note that most applications will redirect their standard output and error stream
 Keil Sudio Cloud has an option to open a serial connection that can be used to monitor these
 streams.
 
-For the Alif Semiconductor's Ensemble DevKit boards, the output over UART is not wired though any
-USB. A 1.8V FTDI USART cable is recommended to view the serial output. By default, the high
-performance core uses UART device 4, and the high efficiency core uses UART device 2. Check the
-board schematic to see which pins these modules use. For the Rev1 version of the board the pins
-are:
+For the Alif Semiconductor™ Ensemble™ AI/ML kit boards, the output over UART is wired though port
+J2 (maked PRG_USB). This port exposes two UARTs - one for SE (Secure Enclave) and the other is
+confirable to pass through either UART2 or UART4 using jumpers on J15. For the applications built,
+the high performance core uses UART4, and the high efficiency core uses UART2.
+
+J15 setup is shown below:
 
 ```
-UART2 RX_B on J413 pin 13 (P3_16) ↔ FTDI TX
-UART2 TX_B on J413 pin 14 (P3_17) ↔ FTDI RX
-UART4 RX_B on J412 pin 11 (P3_1)  ↔ FTDI TX
-UART4 TX_B on J412 pin 12 (P3_2)  ↔ FTDI RX
+J15-1-3 & 2-4:  SE UART
+J15-3-5 & 4-6:  UART2
+J15-5-7 & 6-8:  UART2
+J15-7-9 & 8-10: UART4
 ```
 For all other targets, serial is available over USB from primary debug/connection port.
 

cmsis-pack-examples/cdefault.yml

@@ -1,4 +1,4 @@
-#  SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its
+#  SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its
 #  affiliates <[email protected]>
 #  SPDX-License-Identifier: Apache-2.0
 #
@@ -14,7 +14,7 @@
 #  See the License for the specific language governing permissions and
 #  limitations under the License.
 
-# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/schemas/projmgr/2.0.0/tools/projmgr/schemas/cdefault.schema.json
+# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/schemas/projmgr/2.4.0/tools/projmgr/schemas/cdefault.schema.json
 
 default:
   # Note that we need [email protected] or higher to compile for Corstone-310 target.

cmsis-pack-examples/common/common.clayer.yml

@@ -1,4 +1,4 @@
-#  SPDX-FileCopyrightText: Copyright 2022-2023 Arm Limited and/or its
+#  SPDX-FileCopyrightText: Copyright 2022-2024 Arm Limited and/or its
 #  affiliates <[email protected]>
 #  SPDX-License-Identifier: Apache-2.0
 #
@@ -14,7 +14,7 @@
 #  See the License for the specific language governing permissions and
 #  limitations under the License.
 
-# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/schemas/projmgr/2.0.0/tools/projmgr/schemas/clayer.schema.json
+# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/schemas/projmgr/2.4.0/tools/projmgr/schemas/clayer.schema.json
 
 layer:
 

cmsis-pack-examples/device/alif-ensemble/alif-ensemble-E7-device.clayer.yml

@@ -1,4 +1,4 @@
-#  SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its
+#  SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its
 #  affiliates <[email protected]>
 #  SPDX-License-Identifier: Apache-2.0
 #
@@ -14,7 +14,7 @@
 #  See the License for the specific language governing permissions and
 #  limitations under the License.
 
-# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/schemas/projmgr/2.0.0/tools/projmgr/schemas/clayer.schema.json
+# yaml-language-server: $schema=https://raw.githubusercontent.com/Open-CMSIS-Pack/devtools/schemas/projmgr/2.4.0/tools/projmgr/schemas/clayer.schema.json
 
 layer:
   description: Alif Ensemble E7 ML islands' CPU device layer (High-Performance and High-Efficiency Arm Cortex-M55 CPUs).
@@ -26,7 +26,8 @@ layer:
       files:
         - file: ./src/GpioSignal.cpp
         - file: ./include/GpioSignal.hpp
-        - file: ./src/gpio.c
+        - file: ./src/gpio_wrapper.c
+        - file: ./src/gpio_wrapper.h
 
     - group: AudioHelpers
       for-context: +Alif-E7-M55-HE
@@ -64,11 +65,10 @@ layer:
     - component: AlifSemiconductor::Device:SOC Peripherals:USART
     - component: AlifSemiconductor::Device:SOC Peripherals:GPIO
     - component: AlifSemiconductor::Device:SOC Peripherals:PINCONF
+    - component: AlifSemiconductor::Device:SOC Peripherals:MHU
     - component: AlifSemiconductor::Device:Startup
     - component: ARM::CMSIS Driver:USART
     - component: ARM::CMSIS Driver:USART:Custom
-    - component: AlifSemiconductor::Device:SE Services:SE RunTime services&Source
-    - component: AlifSemiconductor::Device:SE Services:MHU Driver
 
     - component: AlifSemiconductor::Device:SOC Peripherals:DMA
       for-context: +Alif-E7-M55-HE
@@ -79,7 +79,7 @@ layer:
     - component: AlifSemiconductor::Device:SOC Peripherals:I3C
       for-context: +Alif-E7-M55-HP
 
-    - component: AlifSemiconductor::Device:SOC Peripherals:CDC200
+    - component: AlifSemiconductor::Device:SOC Peripherals:CDC
       for-context: +Alif-E7-M55-HP
 
     - component: AlifSemiconductor::Device:SOC Peripherals:MIPI CSI2
@@ -88,11 +88,22 @@ layer:
     - component: AlifSemiconductor::Device:SOC Peripherals:MIPI DSI
       for-context: +Alif-E7-M55-HP
 
-    - component: AlifSemiconductor::Device:SOC Peripherals:CAMERA Controller
+    - component: AlifSemiconductor::Device:SOC Peripherals:I2C
+      for-context: +Alif-E7-M55-HP
+
+    - component: AlifSemiconductor::Device:SOC Peripherals:CPI
       for-context: +Alif-E7-M55-HP
 
     - component: AlifSemiconductor::BSP:External peripherals:ILI9806E LCD panel
       for-context: +Alif-E7-M55-HP
 
     - component: AlifSemiconductor::BSP:External peripherals:CAMERA Sensor ARX3A0
       for-context: +Alif-E7-M55-HP
+
+    - component: AlifSemiconductor::Device:SE runtime Services:core
+      for-context: +Alif-E7-M55-HP
+
+    - component: AlifSemiconductor::Device:SE runtime Services:Initialization Helper
+      for-context: +Alif-E7-M55-HP
+
+

cmsis-pack-examples/device/alif-ensemble/include/CameraCapture.hpp

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its
+ * SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its
  * affiliates <[email protected]>
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -18,18 +18,22 @@
 #ifndef CAMERA_CAPTURE_HPP
 #define CAMERA_CAPTURE_HPP
 
-#if defined (__cplusplus)
-extern "C" {
-    #include "Camera_Common.h"
-}
-#endif
 #include <cstdint>
+#include "Driver_CPI.h"
+#include "RTE_Device.h"
+
+#if !defined(RTE_ARX3A0_CAMERA_SENSOR_FRAME_WIDTH) || !defined(RTE_ARX3A0_CAMERA_SENSOR_FRAME_HEIGHT)
+#error "Camera frame dimensions undefined!"
+#endif
 
-#define CAMERA_FRAME_WIDTH          560
-#define CAMERA_FRAME_HEIGHT         560
-#define CAMERA_RESOLUTION           CAMERA_RESOLUTION_560x560
+#define CAMERA_FRAME_WIDTH          RTE_ARX3A0_CAMERA_SENSOR_FRAME_WIDTH
+#define CAMERA_FRAME_HEIGHT         RTE_ARX3A0_CAMERA_SENSOR_FRAME_HEIGHT
 #define CAMERA_IMAGE_RAW_SIZE       (CAMERA_FRAME_WIDTH * CAMERA_FRAME_HEIGHT)
 
+#if CAMERA_IMAGE_RAW_SIZE <= 0
+#error "Invalid image size"
+#endif
+
 namespace arm {
 namespace app {
 
@@ -48,7 +52,7 @@ enum class ColourFilter {
  * @param raw_image Pointer to the raw image that can be populated.
  * @return int: 0 if successful, error code otherwise
  */
-int CameraCaptureInit(ARM_CAMERA_RESOLUTION resolution);
+int CameraCaptureInit();
 
 /**
  * @brief Starts the camera capture (does not wait for it to finish)

cmsis-pack-examples/device/alif-ensemble/include/GpioSignal.hpp

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright 2022-2023 Arm Limited and/or its
+ * SPDX-FileCopyrightText: Copyright 2022-2024 Arm Limited and/or its
  * affiliates <[email protected]>
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -24,7 +24,7 @@
 extern "C" {
 #endif // #if defined(__cplusplus)
 
-#include "gpio.h"
+#include "gpio_wrapper.h"
 
 #if defined(__cplusplus)
 }
@@ -37,14 +37,17 @@ namespace app {
     enum class SignalDirection { DirectionOutput = 0, DirectionInput = 1, DirectionInvalid = 2 };
 
     /* Valid GPIO port numbers */
-    enum class SignalPort { Port1 = 1, Port2 = 2, Port3 = 3 };
+    enum class SignalPort { Port6 = 6, Port7 = 7, Port12 = 12 };
 
     /* Valid and used GPIO pin number definitions */
     enum class SignalPin {
-        Port1_UserButton1 = 12, /* Wired to SW2 on the board. */
-        Port3_UserButton2 = 4,  /* Wired to SW3 on the board. */
-        Port1_StatusLED1 = 14,  /* LED1 - green. */
-        Port1_StatusLED2 = 15   /* LED2 - orange. */
+        Port12_LED0_R = 3,  /* LED0 - red. */
+        Port07_LED0_G = 4,  /* LED0 - green. */
+        Port12_LED0_B = 0,  /* LED0 - blue. */
+
+        Port06_LED1_R = 2,  /* LED0 - red. */
+        Port06_LED1_G = 4,  /* LED0 - green. */
+        Port06_LED1_B = 6   /* LED0 - blue. */
     };
 
     /**

cmsis-pack-examples/device/alif-ensemble/include/LcdDisplay.hpp

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright 2022-2023 Arm Limited and/or its
+ * SPDX-FileCopyrightText: Copyright 2022-2024 Arm Limited and/or its
  * affiliates <[email protected]>
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -26,6 +26,14 @@
 #define DIMAGE_Y            RTE_PANEL_VACTIVE_LINE
 #define RGB_BYTES           3
 
+#if RTE_CDC200_PIXEL_FORMAT==(1)
+    #define LCD_BYTES_PER_PIXEL     (3)
+#elif RTE_CDC200_PIXEL_FORMAT==(2)
+    #define LCD_BYTES_PER_PIXEL     (2)
+#else // LCD_BYTES_PER_PIXEL
+    #error "Unsupported RTE_CDC200_PIXEL_FORMAT."
+#endif // LCD_BYTES_PER_PIXEL
+
 namespace arm {
 namespace app {
 

cmsis-pack-examples/device/alif-ensemble/src/BoardAudioUtils.cpp

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright 2023 Arm Limited and/or its
+ * SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its
  * affiliates <[email protected]>
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -26,13 +26,13 @@ extern "C" {
 
 #include "RTE_Components.h"
 #include "RTE_Device.h"
-#include <Driver_PINMUX_AND_PINPAD.h>
+#include "pinconf.h"
 #include <Driver_SAI.h>
 #include CMSIS_device_header
 
 #include <stdio.h>
 
-#define I2S_ADC       2 /* Audio I2S Controller 2 */
+#define I2S_ADC       3 /* Audio I2S Controller 3 */
 extern ARM_DRIVER_SAI ARM_Driver_SAI_(I2S_ADC);
 ARM_DRIVER_SAI*       s_i2s_drv;
 
@@ -45,9 +45,9 @@ static volatile audio_capture_state s_cap_state;
 
 static void set_capture_completed(bool val)
 {
-    NVIC_DisableIRQ((IRQn_Type)I2S2_IRQ);
+    NVIC_DisableIRQ((IRQn_Type)I2S3_IRQ_IRQn);
     s_cap_state.capCompleted = val;
-    NVIC_EnableIRQ((IRQn_Type)I2S2_IRQ);
+    NVIC_EnableIRQ((IRQn_Type)I2S3_IRQ_IRQn);
 }
 
 static void set_capture_started(bool val)
@@ -77,20 +77,14 @@ static int32_t ConfigureI2SPinMuxPinPad()
 {
     int32_t status = 0;
 
-    // Configure P2_1.I2S2_SDI_A
-    status |= PINMUX_Config(PORT_NUMBER_2, PIN_NUMBER_1, PINMUX_ALTERNATE_FUNCTION_3);
-    status |=
-        PINPAD_Config(PORT_NUMBER_2,
-                      PIN_NUMBER_1,
-                      PAD_FUNCTION_DRIVER_DISABLE_STATE_WITH_PULL_DOWN | PAD_FUNCTION_READ_ENABLE);
+    /** Configure I2S3_B_WS */
+    status |= pinconf_set(PORT_8, PIN_7, PINMUX_ALTERNATE_FUNCTION_2, 0);
 
-    /* Configure P2_3.I2S2_SCLK_A */
-    status |= PINMUX_Config(PORT_NUMBER_2, PIN_NUMBER_3, PINMUX_ALTERNATE_FUNCTION_3);
-    status |= PINPAD_Config(PORT_NUMBER_2, PIN_NUMBER_3, PAD_FUNCTION_READ_ENABLE);
+    /** Configure I2S3_B_SCLK */
+    status |= pinconf_set(PORT_8, PIN_6, PINMUX_ALTERNATE_FUNCTION_2, 0);
 
-    /* Configure P2_3.I2S2_WS_A */
-    status |= PINMUX_Config(PORT_NUMBER_2, PIN_NUMBER_4, PINMUX_ALTERNATE_FUNCTION_2);
-    status |= PINPAD_Config(PORT_NUMBER_2, PIN_NUMBER_4, PAD_FUNCTION_READ_ENABLE);
+    /** Configure I2S3_B_SDI */
+    status |= pinconf_set(PORT_9, PIN_0, PINMUX_ALTERNATE_FUNCTION_2, PADCTRL_READ_ENABLE);
 
     return status;
 }