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davem330davem330
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Merge branch 'octeontx2-af-fixes'
Sai Krishna says: ==================== octeontx2: Miscellaneous fixes This patchset includes following fixes. Patch #1 Fix for the race condition while updating APR table Patch #2 Fix end bit position in NPC scan config Patch #3 Fix depth of CAM, MEM table entries Patch #4 Fix in increase the size of DMAC filter flows Patch #5 Fix driver crash resulting from invalid interface type information retrieved from firmware Patch #6 Fix incorrect mask used while installing filters involving fragmented packets Patch torvalds#7 Fixes for NPC field hash extract w.r.t IPV6 hash reduction, IPV6 filed hash configuration. Patch torvalds#8 Fix for NPC hardware parser configuration destination address hash, IPV6 endianness issues. Patch torvalds#9 Fix for skipping mbox initialization for PFs disabled by firmware. Patch torvalds#10 Fix disabling packet I/O in case of mailbox timeout. Patch torvalds#11 Fix detaching LF resources in case of VF probe fail. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 9e08dce + 99ae126 commit 2dce08a

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13 files changed

+187
-91
lines changed

13 files changed

+187
-91
lines changed

‎drivers/net/ethernet/marvell/octeontx2/af/cgx.c‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1231,6 +1231,14 @@ static inline void link_status_user_format(u64 lstat,
12311231
linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat);
12321232
linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);
12331233
linfo->lmac_type_id = FIELD_GET(RESP_LINKSTAT_LMAC_TYPE, lstat);
1234+
1235+
if (linfo->lmac_type_id >= LMAC_MODE_MAX) {
1236+
dev_err(&cgx->pdev->dev, "Unknown lmac_type_id %d reported by firmware on cgx port%d:%d",
1237+
linfo->lmac_type_id, cgx->cgx_id, lmac_id);
1238+
strncpy(linfo->lmac_type, "Unknown", LMACTYPE_STR_LEN - 1);
1239+
return;
1240+
}
1241+
12341242
lmac_string = cgx_lmactype_string[linfo->lmac_type_id];
12351243
strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1);
12361244
}

‎drivers/net/ethernet/marvell/octeontx2/af/mbox.c‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -157,7 +157,7 @@ EXPORT_SYMBOL(otx2_mbox_init);
157157
*/
158158
int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase,
159159
struct pci_dev *pdev, void *reg_base,
160-
int direction, int ndevs)
160+
int direction, int ndevs, unsigned long *pf_bmap)
161161
{
162162
struct otx2_mbox_dev *mdev;
163163
int devid, err;
@@ -169,6 +169,9 @@ int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase,
169169
mbox->hwbase = hwbase[0];
170170

171171
for (devid = 0; devid < ndevs; devid++) {
172+
if (!test_bit(devid, pf_bmap))
173+
continue;
174+
172175
mdev = &mbox->dev[devid];
173176
mdev->mbase = hwbase[devid];
174177
mdev->hwbase = hwbase[devid];

‎drivers/net/ethernet/marvell/octeontx2/af/mbox.h‎

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -96,9 +96,10 @@ void otx2_mbox_destroy(struct otx2_mbox *mbox);
9696
int otx2_mbox_init(struct otx2_mbox *mbox, void __force *hwbase,
9797
struct pci_dev *pdev, void __force *reg_base,
9898
int direction, int ndevs);
99+
99100
int otx2_mbox_regions_init(struct otx2_mbox *mbox, void __force **hwbase,
100101
struct pci_dev *pdev, void __force *reg_base,
101-
int direction, int ndevs);
102+
int direction, int ndevs, unsigned long *bmap);
102103
void otx2_mbox_msg_send(struct otx2_mbox *mbox, int devid);
103104
int otx2_mbox_wait_for_rsp(struct otx2_mbox *mbox, int devid);
104105
int otx2_mbox_busy_poll_for_rsp(struct otx2_mbox *mbox, int devid);
@@ -245,9 +246,9 @@ M(NPC_MCAM_READ_BASE_RULE, 0x6011, npc_read_base_steer_rule, \
245246
M(NPC_MCAM_GET_STATS, 0x6012, npc_mcam_entry_stats, \
246247
npc_mcam_get_stats_req, \
247248
npc_mcam_get_stats_rsp) \
248-
M(NPC_GET_SECRET_KEY, 0x6013, npc_get_secret_key, \
249-
npc_get_secret_key_req, \
250-
npc_get_secret_key_rsp) \
249+
M(NPC_GET_FIELD_HASH_INFO, 0x6013, npc_get_field_hash_info, \
250+
npc_get_field_hash_info_req, \
251+
npc_get_field_hash_info_rsp) \
251252
M(NPC_GET_FIELD_STATUS, 0x6014, npc_get_field_status, \
252253
npc_get_field_status_req, \
253254
npc_get_field_status_rsp) \
@@ -1524,14 +1525,20 @@ struct npc_mcam_get_stats_rsp {
15241525
u8 stat_ena; /* enabled */
15251526
};
15261527

1527-
struct npc_get_secret_key_req {
1528+
struct npc_get_field_hash_info_req {
15281529
struct mbox_msghdr hdr;
15291530
u8 intf;
15301531
};
15311532

1532-
struct npc_get_secret_key_rsp {
1533+
struct npc_get_field_hash_info_rsp {
15331534
struct mbox_msghdr hdr;
15341535
u64 secret_key[3];
1536+
#define NPC_MAX_HASH 2
1537+
#define NPC_MAX_HASH_MASK 2
1538+
/* NPC_AF_INTF(0..1)_HASH(0..1)_MASK(0..1) */
1539+
u64 hash_mask[NPC_MAX_INTF][NPC_MAX_HASH][NPC_MAX_HASH_MASK];
1540+
/* NPC_AF_INTF(0..1)_HASH(0..1)_RESULT_CTRL */
1541+
u64 hash_ctrl[NPC_MAX_INTF][NPC_MAX_HASH];
15351542
};
15361543

15371544
enum ptp_op {

‎drivers/net/ethernet/marvell/octeontx2/af/rvu.c‎

Lines changed: 40 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2282,7 +2282,7 @@ static inline void rvu_afvf_mbox_up_handler(struct work_struct *work)
22822282
}
22832283

22842284
static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,
2285-
int num, int type)
2285+
int num, int type, unsigned long *pf_bmap)
22862286
{
22872287
struct rvu_hwinfo *hw = rvu->hw;
22882288
int region;
@@ -2294,6 +2294,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,
22942294
*/
22952295
if (type == TYPE_AFVF) {
22962296
for (region = 0; region < num; region++) {
2297+
if (!test_bit(region, pf_bmap))
2298+
continue;
2299+
22972300
if (hw->cap.per_pf_mbox_regs) {
22982301
bar4 = rvu_read64(rvu, BLKADDR_RVUM,
22992302
RVU_AF_PFX_BAR4_ADDR(0)) +
@@ -2315,6 +2318,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,
23152318
* RVU_AF_PF_BAR4_ADDR register.
23162319
*/
23172320
for (region = 0; region < num; region++) {
2321+
if (!test_bit(region, pf_bmap))
2322+
continue;
2323+
23182324
if (hw->cap.per_pf_mbox_regs) {
23192325
bar4 = rvu_read64(rvu, BLKADDR_RVUM,
23202326
RVU_AF_PFX_BAR4_ADDR(region));
@@ -2343,20 +2349,41 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
23432349
int err = -EINVAL, i, dir, dir_up;
23442350
void __iomem *reg_base;
23452351
struct rvu_work *mwork;
2352+
unsigned long *pf_bmap;
23462353
void **mbox_regions;
23472354
const char *name;
2355+
u64 cfg;
23482356

2349-
mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL);
2350-
if (!mbox_regions)
2357+
pf_bmap = bitmap_zalloc(num, GFP_KERNEL);
2358+
if (!pf_bmap)
23512359
return -ENOMEM;
23522360

2361+
/* RVU VFs */
2362+
if (type == TYPE_AFVF)
2363+
bitmap_set(pf_bmap, 0, num);
2364+
2365+
if (type == TYPE_AFPF) {
2366+
/* Mark enabled PFs in bitmap */
2367+
for (i = 0; i < num; i++) {
2368+
cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(i));
2369+
if (cfg & BIT_ULL(20))
2370+
set_bit(i, pf_bmap);
2371+
}
2372+
}
2373+
2374+
mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL);
2375+
if (!mbox_regions) {
2376+
err = -ENOMEM;
2377+
goto free_bitmap;
2378+
}
2379+
23532380
switch (type) {
23542381
case TYPE_AFPF:
23552382
name = "rvu_afpf_mailbox";
23562383
dir = MBOX_DIR_AFPF;
23572384
dir_up = MBOX_DIR_AFPF_UP;
23582385
reg_base = rvu->afreg_base;
2359-
err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF);
2386+
err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF, pf_bmap);
23602387
if (err)
23612388
goto free_regions;
23622389
break;
@@ -2365,7 +2392,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
23652392
dir = MBOX_DIR_PFVF;
23662393
dir_up = MBOX_DIR_PFVF_UP;
23672394
reg_base = rvu->pfreg_base;
2368-
err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF);
2395+
err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF, pf_bmap);
23692396
if (err)
23702397
goto free_regions;
23712398
break;
@@ -2396,16 +2423,19 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
23962423
}
23972424

23982425
err = otx2_mbox_regions_init(&mw->mbox, mbox_regions, rvu->pdev,
2399-
reg_base, dir, num);
2426+
reg_base, dir, num, pf_bmap);
24002427
if (err)
24012428
goto exit;
24022429

24032430
err = otx2_mbox_regions_init(&mw->mbox_up, mbox_regions, rvu->pdev,
2404-
reg_base, dir_up, num);
2431+
reg_base, dir_up, num, pf_bmap);
24052432
if (err)
24062433
goto exit;
24072434

24082435
for (i = 0; i < num; i++) {
2436+
if (!test_bit(i, pf_bmap))
2437+
continue;
2438+
24092439
mwork = &mw->mbox_wrk[i];
24102440
mwork->rvu = rvu;
24112441
INIT_WORK(&mwork->work, mbox_handler);
@@ -2414,8 +2444,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
24142444
mwork->rvu = rvu;
24152445
INIT_WORK(&mwork->work, mbox_up_handler);
24162446
}
2417-
kfree(mbox_regions);
2418-
return 0;
2447+
goto free_regions;
24192448

24202449
exit:
24212450
destroy_workqueue(mw->mbox_wq);
@@ -2424,6 +2453,8 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,
24242453
iounmap((void __iomem *)mbox_regions[num]);
24252454
free_regions:
24262455
kfree(mbox_regions);
2456+
free_bitmap:
2457+
bitmap_free(pf_bmap);
24272458
return err;
24282459
}
24292460

‎drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c‎

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -60,13 +60,14 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc,
6060
u64 iova, u64 *lmt_addr)
6161
{
6262
u64 pa, val, pf;
63-
int err;
63+
int err = 0;
6464

6565
if (!iova) {
6666
dev_err(rvu->dev, "%s Requested Null address for transulation\n", __func__);
6767
return -EINVAL;
6868
}
6969

70+
mutex_lock(&rvu->rsrc_lock);
7071
rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova);
7172
pf = rvu_get_pf(pcifunc) & 0x1F;
7273
val = BIT_ULL(63) | BIT_ULL(14) | BIT_ULL(13) | pf << 8 |
@@ -76,21 +77,23 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc,
7677
err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false);
7778
if (err) {
7879
dev_err(rvu->dev, "%s LMTLINE iova transulation failed\n", __func__);
79-
return err;
80+
goto exit;
8081
}
8182
val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS);
8283
if (val & ~0x1ULL) {
8384
dev_err(rvu->dev, "%s LMTLINE iova transulation failed err:%llx\n", __func__, val);
84-
return -EIO;
85+
err = -EIO;
86+
goto exit;
8587
}
8688
/* PA[51:12] = RVU_AF_SMMU_TLN_FLIT0[57:18]
8789
* PA[11:0] = IOVA[11:0]
8890
*/
8991
pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18;
9092
pa &= GENMASK_ULL(39, 0);
9193
*lmt_addr = (pa << 12) | (iova & 0xFFF);
92-
93-
return 0;
94+
exit:
95+
mutex_unlock(&rvu->rsrc_lock);
96+
return err;
9497
}
9598

9699
static int rvu_update_lmtaddr(struct rvu *rvu, u16 pcifunc, u64 lmt_addr)

‎drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c‎

Lines changed: 17 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -13,11 +13,6 @@
1313
#include "rvu_npc_fs.h"
1414
#include "rvu_npc_hash.h"
1515

16-
#define NPC_BYTESM GENMASK_ULL(19, 16)
17-
#define NPC_HDR_OFFSET GENMASK_ULL(15, 8)
18-
#define NPC_KEY_OFFSET GENMASK_ULL(5, 0)
19-
#define NPC_LDATA_EN BIT_ULL(7)
20-
2116
static const char * const npc_flow_names[] = {
2217
[NPC_DMAC] = "dmac",
2318
[NPC_SMAC] = "smac",
@@ -442,6 +437,7 @@ static void npc_handle_multi_layer_fields(struct rvu *rvu, int blkaddr, u8 intf)
442437
static void npc_scan_ldata(struct rvu *rvu, int blkaddr, u8 lid,
443438
u8 lt, u64 cfg, u8 intf)
444439
{
440+
struct npc_mcam_kex_hash *mkex_hash = rvu->kpu.mkex_hash;
445441
struct npc_mcam *mcam = &rvu->hw->mcam;
446442
u8 hdr, key, nr_bytes, bit_offset;
447443
u8 la_ltype, la_start;
@@ -490,8 +486,21 @@ do { \
490486
NPC_SCAN_HDR(NPC_SIP_IPV4, NPC_LID_LC, NPC_LT_LC_IP, 12, 4);
491487
NPC_SCAN_HDR(NPC_DIP_IPV4, NPC_LID_LC, NPC_LT_LC_IP, 16, 4);
492488
NPC_SCAN_HDR(NPC_IPFRAG_IPV6, NPC_LID_LC, NPC_LT_LC_IP6_EXT, 6, 1);
493-
NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16);
494-
NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16);
489+
if (rvu->hw->cap.npc_hash_extract) {
490+
if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][0])
491+
NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 4);
492+
else
493+
NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16);
494+
495+
if (mkex_hash->lid_lt_ld_hash_en[intf][lid][lt][1])
496+
NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 4);
497+
else
498+
NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16);
499+
} else {
500+
NPC_SCAN_HDR(NPC_SIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 8, 16);
501+
NPC_SCAN_HDR(NPC_DIP_IPV6, NPC_LID_LC, NPC_LT_LC_IP6, 24, 16);
502+
}
503+
495504
NPC_SCAN_HDR(NPC_SPORT_UDP, NPC_LID_LD, NPC_LT_LD_UDP, 0, 2);
496505
NPC_SCAN_HDR(NPC_DPORT_UDP, NPC_LID_LD, NPC_LT_LD_UDP, 2, 2);
497506
NPC_SCAN_HDR(NPC_SPORT_TCP, NPC_LID_LD, NPC_LT_LD_TCP, 0, 2);
@@ -594,8 +603,7 @@ static int npc_scan_kex(struct rvu *rvu, int blkaddr, u8 intf)
594603
*/
595604
masked_cfg = cfg & NPC_EXACT_NIBBLE;
596605
bitnr = NPC_EXACT_NIBBLE_START;
597-
for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg,
598-
NPC_EXACT_NIBBLE_START) {
606+
for_each_set_bit_from(bitnr, (unsigned long *)&masked_cfg, NPC_EXACT_NIBBLE_END + 1) {
599607
npc_scan_exact_result(mcam, bitnr, key_nibble, intf);
600608
key_nibble++;
601609
}

‎drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,10 @@
99
#define __RVU_NPC_FS_H
1010

1111
#define IPV6_WORDS 4
12+
#define NPC_BYTESM GENMASK_ULL(19, 16)
13+
#define NPC_HDR_OFFSET GENMASK_ULL(15, 8)
14+
#define NPC_KEY_OFFSET GENMASK_ULL(5, 0)
15+
#define NPC_LDATA_EN BIT_ULL(7)
1216

1317
void npc_update_entry(struct rvu *rvu, enum key_fields type,
1418
struct mcam_entry *entry, u64 val_lo,

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