@@ -407,6 +407,7 @@ TD_WS_SETUP = 1 ; set wait state register on boot
407407UNSAFE_REFRESH = 1 ; go big or go home
408408DRAM_REFRESH = 655
409409N3_UMA = 1 ; enable UMA bank (E000) on boot
410+ POST_CARD = 0 ; not enough code space
410411 ENDIF
411412 ENDIF
412413
@@ -6379,7 +6380,7 @@ BEEP_PROC PROC
63796380; (then how does the speaker work?)
63806381; Note 2: cannot use stack since HALT_BEEP could occur before stack
63816382;
6382- ; Size: 57 bytes
6383+ ; Size: 60 bytes
63836384;----------------------------------------------------------------------------;
63846385HALT_BEEP PROC
63856386 MOV DX , CS ; SS to CS
@@ -6389,9 +6390,11 @@ HALT_BEEP PROC
63896390 AAM_I 10H ; split nibbles
63906391 XCHG AX , BP ; BP(H) = short beeps, BP(L) = long beeps
63916392HALT_BEEP_START:
6393+ IO_DELAY_TURBO ; pause between sequences, CX = 0
63926394 MOV DX , BP ; restore original beep pattern
63936395 MOV SI , BEEP_ERR_LOW ; low C5
6394- XOR DI , DI ; low beep on 100%
6396+ HALT_BEEP_NEXT:
6397+ MOV DI , CX ; set beep duration for this loop
63956398HALT_BEEP_REP:
63966399 MOV AX , SI ; restore beep tone
63976400 CALL_NS BEEP_ON_P , 1 ; turn on speaker/beep, BL = old PPI state
@@ -6406,9 +6409,9 @@ HALT_BEEP_REP:
64066409 XCHG DL , DH ; swap beep counts
64076410 TEST DX , DX ; both cycles done?
64086411 JZ HALT_BEEP_START ; if so, restart beep pattern
6409- MOV DI , DBW < 100H * 1 / 3 > ; else, short beep on 33%
6412+ MOV CH , 100H * 1 / 3 ; else, short beep on 33%
64106413 MOV SI , BEEP_ERR_HIGH ; high F5
6411- JMP HALT_BEEP_REP ; start short cycle
6414+ JMP HALT_BEEP_NEXT ; start short cycle
64126415HALT_BEEP ENDP
64136416
64146417;----------------------------------------------------------------------------;
@@ -6646,7 +6649,7 @@ L_INT_KB_CTRL_ASC_TBL EQU ($-INT_KB_CTRL_ASC_TBL)/2 ; 12 total
66466649L_INT_KB_CTRL_SCAN_TBL EQU ($ - INT_KB_CTRL_SCAN_TBL)/ 2 - 1 ; 6
66476650
66486651;
6649- ; 4 BYTES HERE
6652+ ; 1 BYTE HERE
66506653;
66516654BYTES_HERE INT_09
66526655
0 commit comments